The present invention includes: a multilayer film forming step of forming a multilayer film constituted by a plurality of metal films layered together; after the multilayer film forming step, a resist forming step of forming a resist film having patterned openings on the multilayer film; after the resist forming step, a dry etching step of dry etching the multilayer film to remove at least one metal film located at the top of the multilayer film and exposed by the openings; after the dry etching step, a wet etching step of wet etching the multilayer film to remove at least the metal films exposed by the openings.

A display device manufacturing method includes annealing a display substrate by irradiating a laser to the display substrate in different energy values, measuring a transmittance of the annealed display substrate, and determining an optimal crystallization value of the display substrate based on the transmittance, wherein the determining of the optimal crystallization value includes calculating an absorbance of the display substrate for each energy value of the laser based on the transmittance, calculating a band gap energy of the annealed display substrate for each energy value of the laser based on the absorbance, and determining an energy value of the laser corresponding to a minimum value of the band gap energy as the optimal crystallization value. Also provided is a display device manufacturing apparatus that may implement the manufacturing method.

A method of manufacturing a TFT substrate includes the steps of forming an oxide semiconductor layer above a substrate, forming a first oxide film on the oxide semiconductor layer, performing oxidation processing on the oxide semiconductor layer after formation of the first oxide film, and forming a second oxide film on the first oxide film after the oxidation processing.

There is provided a method of patterning a stack of layers defining one or more electronic device elements, comprising: creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level; wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion.

The present disclosure provides an array substrate and a method of manufacturing the same and a display panel, which belongs to the field of display technologies. The method of manufacturing the array substrate comprises: providing a base substrate; forming a drive circuit layer on the base substrate, wherein the drive circuit layer includes a switching transistor; forming an insulating material layer on one side of the drive circuit layer distal to the base substrate, wherein the insulating material layer has a connection via-hole exposing at least a part region of a drain electrode of the switching transistor; and forming an electrode layer on one side of the insulating material layer distal to the base substrate, wherein a surface of the electrode layer distal to the base substrate has groove structures extending to the connection via-hole. The manufacturing method may avoid the occurrence of poor coating in forming an orientation layer.

A display includes a first substrate, a second substrate, a plurality of pixels and a photo-catalyst layer. The plurality of pixels are disposed between the first substrate and the second substrate. The photo-catalyst layer is disposed above a surface of the second substrate facing the first substrate or above a surface of the first substrate facing the second substrate. Manufacturing methods of a display are additionally disclosed.

The present disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate comprises a base substrate; a signal line and an electrode arranged in different layers on the base substrate, and an insulating layer located between the signal line and the electrode. The array substrate further comprises a dielectric film located between the signal line and the insulating layer, the dielectric film covering the signal line; and/or a dielectric film located between the electrode and the insulating layer, the dielectric film covering the electrode.

The present disclosure provides a TFT, its manufacturing method, an array substrate and a display device. The method includes steps of: forming a pattern of a gate electrode on a base substrate; forming a gate insulation layer with an even surface; forming a pattern of a polysilicon semiconductor layer; and forming patterns of a source electrode and a drain electrode. The step of forming the pattern of the polysilicon semiconductor layer includes: crystallizing the amorphous silicon layer, so as to form the polysilicon semiconductor layer.

A thin-film transistor, a display device including a thin-film transistor, and a method of manufacturing a thin-film transistor are provided. A thin-film transistor includes: a semiconductor layer including: a first oxide semiconductor layer including gallium (Ga), a second oxide semiconductor layer, and a silicon semiconductor layer between the first oxide semiconductor layer and the second oxide semiconductor layer, and a gate electrode spaced apart from the semiconductor layer and partially overlapping at least a part of the semiconductor layer.

The present disclosure provides a display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate and a plurality of subpixels arranged in an array form on the base substrate. Each subpixel includes a voltage stabilizing electrode, and a subpixel driving circuitry including a driving transistor, and a first transistor, a first electrode of which is coupled to a second electrode of the driving transistor, and a second electrode of which is coupled to a gate electrode of the driving transistor. An active layer of the first transistor includes a first semiconductor portion and a second semiconductor portion spaced apart from each other, and a conductor portion coupled to thereto. An orthogonal projection of the conductor portion onto the base substrate overlaps an orthogonal projection of voltage stabilizing electrode of a previous subpixel in the first direction onto the base substrate.