Patent classifications
H01L28/26
Heterogeneous annealing method
A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.
HETEROGENEOUS ANNEALING METHOD AND DEVICE
A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.
Patterning sheet and etched structure production method
A patterning sheet, or the like, is suitable when a complex etching target is to be etched in a simple manner to produce an etched structure. This patterning sheet comprises a base sheet formed from an etching-solution permeable first polymer, and particles dispersed in the base sheet and formed from a second polymer, which absorbs and holds the etching solution.
Configurable resistor
In an example, there is disclosed a configurable impedance element, having: a first impedance network including a plurality of series impedance elements and providing an initial impedance; a trim impedance network parallel to the first impedance network, including a plurality of corresponding impedance elements to the impedance elements of the first impedance network; and antifuses between the impedance elements of the first impedance network and their corresponding impedance elements of the trim network. There is also disclosed an integrated circuit including the impedance element, and a method of manufacturing and configuring the impedance element.
HETEROGENEOUS ANNEALING METHOD AND DEVICE
A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.
Heterogeneous device
A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.
Resistive element and method of manufacturing the resistive element
A resistive element includes: a semiconductor substrate; a first insulating film deposited on the semiconductor substrate; a resistive layer deposited on the first insulating film; a second insulating film deposited to cover the first insulating film and the resistive layer; a first electrode deposited on the second insulating film and electrically connected to the resistive layer; a relay wire deposited on the second insulating film without being in contact with the first electrode, and including a resistive-layer connection terminal electrically connected to the resistive layer and a substrate connection terminal connected to the semiconductor substrate with an ohmic contact; and a second electrode deposited on a bottom side of the semiconductor substrate, wherein a resistor is provided between the first electrode and the second electrode.
PATTERNING SHEET AND ETCHED STRUCTURE PRODUCTION METHOD
A patterning sheet, or the like, is suitable when a complex etching target is to be etched in a simple manner to produce an etched structure. This patterning sheet comprises a base sheet formed from an etching-solution permeable first polymer, and particles dispersed in the base sheet and formed from a second polymer, which absorbs and holds the etching solution.
CONFIGURABLE RESISTOR
In an example, there is disclosed a configurable impedance element, having: a first impedance network including a plurality of series impedance elements and providing an initial impedance; a trim impedance network parallel to the first impedance network, including a plurality of corresponding impedance elements to the impedance elements of the first impedance network; and antifuses between the impedance elements of the first impedance network and their corresponding impedance elements of the trim network. There is also disclosed an integrated circuit including the impedance element, and a method of manufacturing and configuring the impedance element.
Thrysitor and thermal switch device and assembly techniques therefor
A device may include a lead frame, where the lead frame includes a central portion, and a side pad, the side pad being laterally disposed with respect to the central portion. The device may further include a thyristor device, the thyristor device comprising a semiconductor die and further comprising a gate, wherein the thyristor device is disposed on a first side of the lead frame on the central portion. The device may also include a positive temperature coefficient (PTC) device electrically coupled to the gate of the thyristor device, wherein the PTC device is disposed on the side pad on the first side of the lead frame; and a thermal coupler having a first end connected to the thyristor device and a second end attached to the PTC device.