A transistor device includes a semiconductor substrate having a first major surface, a cell field including transistor cells, and an edge termination region laterally surrounding the cell field. Each transistor cell includes a drift region of a first conductivity type, a first body region of a second conductivity type on the drift region, a source region of the first conductivity type on the first body region and a gate electrode. The transistor device further includes an elongate source contact having opposing first and second distal ends, the elongate source contact being in contact with the source region, and a second body region of the second conductivity type positioned in the semiconductor substrate. The second body region has a lateral extent such that it is spaced part from the second distal end of the elongate source contact and extends laterally beyond the first distal end of the elongate source contact.

A transistor device includes a semiconductor substrate having a first major surface, a cell field, and an edge termination region laterally surrounding the cell field. The cell field includes elongate trenches that extend from the first major surface into the semiconductor substrate and that are positioned substantially parallel to one another such that one or more inner elongate trenches are arranged between two outermost elongate trenches and elongate mesas, each elongate mesa being formed between neighbouring elongate trenches. The elongate mesas include a drift region, a body region on the drift region and a source region on the body region. In a top view, one or both of the outermost elongate trenches has a different contour from the one or more inner elongate trenches.

A semiconductor device includes first to fourth electrodes, a semiconductor portion, and first and second insulating films. The semiconductor portion includes first to third semiconductor layers. The second electrode is in contact with the third semiconductor layer and is spaced from the second semiconductor layer, the third semiconductor layer, and the second electrode. The first insulating film covers the third electrode. The fourth electrode is connected to the second electrode, and is spaced from the first semiconductor layer and the third electrode. The second insulating film is provided on a side surface of the fourth electrode, faces the first semiconductor layer through an air gap, and increases in thickness toward the first direction.

Devices, methods and techniques are disclosed to suppress electrical discharge and breakdown in insulating or encapsulation material(s) applied to solid-state devices. In one example aspect, a multi-layer encapsulation film includes a first layer of a first dielectric material and a second layer of a second dielectric material. An interface between the first layer and the second layer is configured to include molecular bonds to prevent charge carriers from crossing between the first layer and the second layer. The multi-layer encapsulation configuration is structured to allow an electrical contact and a substrate of the solid-state device to be at least partially surrounded by the multi-layer encapsulation configuration.

A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.

A semiconductor device may include a first device on a first portion of a substrate, a second device on a second portion of the substrate, and a third device on a third portion of the substrate. The third device may include an oxide layer that is formed from an oxide layer that is a sacrificial oxide layer for the first device and the second device. The third device may include a gate provided on the oxide layer, a set of spacers provided on opposite sides of the gate, and a source region provided in the third portion of the substrate on one side of the gate. The third device may include a drain region provided in the third portion of the substrate on another side of the gate, and a protective oxide layer provided on a portion of the gate and a portion of the drain region.

A fabrication method for a semiconductor device includes measuring a thickness of a semiconductor substrate in which a bulk donor of a first conductivity type is entirely distributed, adjusting an implantation condition in accordance with the thickness of the semiconductor substrate and implanting hydrogen ions from a lower surface of the semiconductor substrate to an upper surface side of the semiconductor substrate, and annealing the semiconductor substrate and forming, in a passage region through which the hydrogen ions have passed, a first high concentration region of the first conductivity type in which a donor concentration is higher than a doping concentration of the bulk donor.

A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.

A reverse blocking gallium nitride (GaN) high electron mobility transistor includes, sequentially stacked from bottom to top, a substrate, a nucleation layer, a buffer layer, a barrier layer, a dielectric layer. The buffer layer and the barrier layer form a heterojunction structure. The barrier layer is provided with at least two p-GaN structures. The barrier layer is provided with a source metal at one end and a drain metal at the other end, source metal forms ohmic contact and drain metal forms Schottky contact with AlGaN barrier, respectively. In forward conduction, the two-dimensional electron gas below the spaced p-GaN structure connected to the drain metal is conductive, and a turn-on voltage of the device is low. During reverse blocking, the two-dimensional electron gas at the spaced p-GaN structure is rapidly depleted under reverse bias, to form a depletion region, so that the blocking capability of the device is improved.

A semiconductor structure including a substrate, a first well, a second well, a first doped region, a second doped region, a gate electrode, an insulating layer, a field plate, and a tunable circuit is provided. The first and second wells are formed on the substrate. The first doped region is formed in the first well. The second doped region is formed in the second well. The gate electrode is disposed over the substrate. The gate electrode, the first doped region, and the second doped region constitute a transistor. The insulating layer is disposed on the substrate and overlaps the gate electrode. The field plate overlaps the insulating layer and the gate electrode. The tunable circuit provides either a first short-circuit path between the field plate and the gate electrode, or a second short-circuit path between the field plate and the first doped region.