H01L29/24

Memory cell device with thin-film transistor selector and methods for forming the same

A memory structure, device, and method of making the same, the memory structure including a surrounding gate thin film transistor (TFT) and a memory cell stacked on the GAA transistor. The GAA transistor includes: a channel comprising a semiconductor material; a source electrode electrically connected to a first end of the channel; a drain electrode electrically connected to an opposing second end of the channel; a high-k dielectric layer surrounding the channel; and a gate electrode surrounding the high-k dielectric layer. The memory cell includes a first electrode that is electrically connected to the drain electrode.

Memory cell device with thin-film transistor selector and methods for forming the same

A memory structure, device, and method of making the same, the memory structure including a surrounding gate thin film transistor (TFT) and a memory cell stacked on the GAA transistor. The GAA transistor includes: a channel comprising a semiconductor material; a source electrode electrically connected to a first end of the channel; a drain electrode electrically connected to an opposing second end of the channel; a high-k dielectric layer surrounding the channel; and a gate electrode surrounding the high-k dielectric layer. The memory cell includes a first electrode that is electrically connected to the drain electrode.

Topological quantum computing components, systems, and methods

A qubit device includes a crystal immobilized on a substrate and in contact with electrodes. The crystal exhibits a charge pair symmetry and with an electron current moving clockwise, counter clockwise, or both. The current in can be placed in a state of superposition wherein the current is unknown until it is measured, and the direction of the current is measured to produce a binary output corresponding to a logical zero or a logical one. A state of the qubit device is monitored by measuring a voltage, a current, or a magnetic field and assigning a superposition or base state depending on a threshold value.

Topological quantum computing components, systems, and methods

A qubit device includes a crystal immobilized on a substrate and in contact with electrodes. The crystal exhibits a charge pair symmetry and with an electron current moving clockwise, counter clockwise, or both. The current in can be placed in a state of superposition wherein the current is unknown until it is measured, and the direction of the current is measured to produce a binary output corresponding to a logical zero or a logical one. A state of the qubit device is monitored by measuring a voltage, a current, or a magnetic field and assigning a superposition or base state depending on a threshold value.

Field effect transistor using transition metal dichalcogenide and a method for forming the same

In a method of forming a two-dimensional material layer, a nucleation pattern is formed over a substrate, and a transition metal dichalcogenide (TMD) layer is formed such that the TMD layer laterally grows from the nucleation pattern. In one or more of the foregoing and following embodiments, the TMD layer is single crystalline.

Field effect transistor using transition metal dichalcogenide and a method for forming the same

In a method of forming a two-dimensional material layer, a nucleation pattern is formed over a substrate, and a transition metal dichalcogenide (TMD) layer is formed such that the TMD layer laterally grows from the nucleation pattern. In one or more of the foregoing and following embodiments, the TMD layer is single crystalline.

TWO-DIMENSIONAL ELECTRON GAS AT INTERFACE BETWEEN BASNO3 AND LAINO3

Provided is an electronic device using an interface between BaSnO.sub.3 and LaInO.sub.3, the electronic device including: a substrate formed of a metal oxide of non-SrTiO.sub.3 material a first buffer layer disposed on the substrate and formed of a BaSnO.sub.3 material; a BLSO layer disposed on at least a portion of the first buffer layer and formed of a (Ba.sub.1-x, La.sub.x)SnO.sub.3 material, wherein x has a value equal to or greater than 0 and less than or equal to 1; an LIO layer at least partially disposed on at least a portion of the BLSO layer so as to form an interface between the LIO layer and the BLSO layer, and formed of an LaInO.sub.3 material; and a first electrode layer at least partially in contact with the interface between the BLSO layer and the LIO layer, and formed of at least two or more separated portions.

SCHOTTKY BARRIER DIODE
20230039171 · 2023-02-09 ·

A Schottky barrier diode includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and formed on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating film covering the inner wall of a trench formed in the drift layer, and a protective film covering the anode electrode, wherein a part of the protective film is embedded in the trench. The part of the protective film is thus embedded in the trench, so that adhesion performance between the anode electrode and protective film is enhanced. This makes it possible to prevent peeling at the boundary between the anode electrode and the protective film.

SCHOTTKY BARRIER DIODE
20230039171 · 2023-02-09 ·

A Schottky barrier diode includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and formed on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating film covering the inner wall of a trench formed in the drift layer, and a protective film covering the anode electrode, wherein a part of the protective film is embedded in the trench. The part of the protective film is thus embedded in the trench, so that adhesion performance between the anode electrode and protective film is enhanced. This makes it possible to prevent peeling at the boundary between the anode electrode and the protective film.

TRENCH-TYPE MESFET
20230043402 · 2023-02-09 · ·

A trench-type MESFET includes an n-type semiconductor layer including a Ga.sub.2O.sub.3-based single crystal and including plural trenches opening on one surface, first insulators respectively buried in bottom portions of the plural trenches, gate electrodes respectively buried in the plural trenches so as to be placed on the first insulators and so that side surfaces thereof are in contact with the n-type semiconductor layer, a source electrode connected to a mesa-shaped portion between the adjacent trenches of the n-type semiconductor layer, second insulators respectively buried in the plural trenches so as to be placed on the gate electrodes to insulate the gate electrodes and the source electrode, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on a side opposite to the source electrode.