A method includes forming a first dielectric layer over the substrate and covering first, second, third, fourth, fifth and sixth protrusion regions; forming first, second, and third gate conductors over the first, fourth, and fifth protrusion regions, respectively; performing a first implantation process to form a second source region and a second drain region in the fourth protrusion region; performing a second implantation process to form a first source region and a first drain region in the first protrusion region, and to form a third source region and a third drain region in the fifth protrusion region; forming a metal layer over the third protrusion region; patterning the metal layer to form an inner circular electrode and an outer ring electrode encircling the inner circular electrode; forming a word line; and forming a bit line.

An integrated circuit device includes a semiconductor structure, a tunneling layer, a top electrode, a passivation layer, and a conductive feature. The semiconductor structure has a base portion and a protruding portion over a top surface of the base portion. The tunneling layer is over a top surface of the protruding portion of the semiconductor structure. The top electrode is over the tunneling layer. The passivation layer is over a sidewall of the protruding portion of the semiconductor structure. The conductive feature is directly below the protruding portion of the semiconductor structure.

The method that includes cleaning the surface of a silicon wafer, forming a sacrificial layer on top of the silicon wafer; forming at least one window in the sacrificial layer exposing the surface of the silicon wafer, and processing the silicon wafer, wherein the processing includes forming at least one layer in the at least window, such that, wherein the at least one layer includes a first section that is direct contact with the silicon wafer and the walls of the at least one window created by the sacrificial layer, a main section that extends from the first section, and a bump out section that extends from the sides of the main section and the bottom surface of the bump out section is in contact with the sacrificial layer. Prior to the insertion into a dilute refrigeration unit removing the sacrificial layer by exposing it to a solvent, wherein the removal of the sacrificial layer causes the bottom surface of the bump section, the side portion of the first section, and the top surface of the silicon form a space without material.

A physically unclonable function (PUF) device 1 capable of exhibiting a unique quantum mechanical effect as a result of quantum mechanical confinement exhibited by the device 1. The device 1 comprises a group IV semiconductor heterostructure. The group IV semiconductor heterostructure may comprise Silicon/Germanium. The device 1 may comprise a group IV semiconductor resonant tunnelling diode (RTD). A Si-integrated circuit, method, use, and apparatus are also provided.

In one general embodiment, a structure includes a first diode, comprising: a first layer having a first type of dopant, and a second layer above the first layer, the second layer having a second type of dopant that is opposite to the first type of dopant. A second diode is formed directly on the first diode. The second diode comprises a first layer having a third type of dopant and a second layer above the first layer of the second diode, the second layer of the second diode having a fourth type of dopant that is opposite to the third type of dopant. In another general embodiment, a process includes a repeated sequence of growing a first layer having a first type of electrically active dopant and growing a second layer having a second type of electrically active dopant that is opposite to the first type of dopant.

Described herein are methods for using remote plasma chemical vapor deposition (RP-CVD) and sputtering deposition to grow layers for light emitting devices. A method includes growing a light emitting device structure on a growth substrate, and growing a tunnel junction on the light emitting device structure using at least one of RP-CVD and sputtering deposition. The tunnel junction includes a p++ layer in direct contact with a p-type region, where the p++ layer is grown by using at least one of RP-CVD and sputtering deposition. Another method for growing a device includes growing a p-type region over a growth substrate using at least one of RP-CVD and sputtering deposition, and growing further layers over the p-type region. Another method for growing a device includes growing a light emitting region and an n-type region using at least one of RP-CVD and sputtering deposition over a p-type region.

In one embodiment, a mask set for use in fabricating thin film tunneling devices includes a first photomask configured to form bottom electrodes of the devices, the first photomask comprising a first alignment mark including multiple corner markers, and a second photomask configured to form a continuous top layer of the devices, the second photomask comprising a second alignment mark including a corner marker configured to be aligned with one of the corner markers of the first photomask, wherein a degree of overlap between the bottom electrodes and the continuous top layer depends upon the corner marker of the first photomask with which the corner marker of the second photomask aligns.

A coherent frequency modulated receiver for receiving and detecting arriving optical signals which comprises an electrically controllable optical beam scanner receiving optical input beams arriving at different angles in a field of view of the electrically controllable optical beam scanner, the electrically controllable optical beam scanner conveying a scanned optical input beam as its output optical beam; a grating coupler responsive to the output or reflected optical beam of the electrically controllable optical beams scanner, the grating coupler having a waveguided output; an optical local oscillator laser having a waveguided output; an FMCW signal generator; an optical modulator responsive to the optical waveguided outputs of the optical local oscillator laser and also to an electrical FMCW signal from the FMCW signal generator; a pair of second order non-linear optical elements for frequency upconverting respective outputs of the optical modulator and the grating coupler; and at least one photodiode optically coupled to an outputs of the pair of second order non-linear optical elements.

Disclosed is a tunneling diode, which includes a graphene-silicon quantum dot hybrid structure, having improved performance and electrical characteristics by controlling the sizes of silicon quantum dots and the doping concentration of graphene. The ideal tunneling diode of the present disclosure may be utilized in diode-based optoelectronic devices.

Devices, methods and techniques are disclosed for providing a multi-layer diode without voids between layers. In one example aspect, a multi-stack diode includes at least two Drift Step Recovery Diodes (DSRDs). Each DSRD comprises a first layer having a first type of dopant, a second layer forming a region with at least ten times lower concentration of dopants compared to the adjacent layers, and a third layer having a second type of dopant that is opposite to the first type of dopant. The first layer of a second DSRD is positioned on top of the third layer of first DSRD. The first layer of the second DSRD and the third layer of the first DSRD are degenerate to form a tunneling diode at an interface of the first DSRD and second DSRD, the tunneling diode demonstrating a linear current-voltage characteristic.