Patent classifications
H01L29/7428
Silicon controlled rectifier dynamic triggering and shutdown via control signal amplification
Electrical overstress protection via silicon controlled rectifier (SCR) trigger amplification control is provided. In certain configurations, an overstress protection circuit includes a control circuit for detecting presence of an overstress event between a first pad and a second pad of an interface, and a discharge circuit electrically connected between the first pad and the second pad and selectively activated by the control circuit. The interface corresponds to an electronic interface of an integrated circuit (IC), a System on a Chip (SoC), or System in-a-Package (SiP). The discharge circuit includes a first smaller SCR and a second larger SCR. In response to detecting an overstress event, the control circuit activates the smaller SCR, which in turn activates the larger SCR to provide clamping between the first pad and the second pad.
BIDIRECTIONAL THYRISTOR DEVICE
A bidirectional thyristor device (1) comprising a semiconductor body (2) extending between a first main surface (21) and a second main surface (22), is provided wherein a first main electrode (31) and a first gate electrode (41) are arranged on the first main surface and a second main electrode (32) and a second gate electrode (42) are arranged on the second main surface. The first main electrode comprises a plurality of first segments (310) that are spaced apart from one another, wherein at least some of the first segments are completely surrounded by the first gate electrode in a view onto the first main surface. The second main electrode comprises a plurality of second segments (320) that are spaced apart from one another, wherein at least some of the second segments are completely surrounded by the second gate electrode in a view onto the second main surface.
Light detection and ranging (LIDAR) sensor system including integrated light source
A light detection and ranging (LIDAR) sensor system mounted to a vehicle includes a first device and a second device coupled to the first device. The first device includes a laser source and one or more optical components. The first device is configured to output an optical signal associated with a local oscillator (LO) signal. The second device includes an optical amplifier array device and a transceiver device. The optical amplifier array device includes an integrated optical component and is configured to amplify the optical signal. The transceiver device is configured to transmit the amplified optical signal to an environment and receive a returned optical signal that is reflected from an object in the environment.
ESD PROTECTION DEVICE, SEMICONDUCTOR DEVICE THAT INCLUDES AN ESD PROTECTION DEVICE, AND METHOD OF MANUFACTURING SAME
An ESD protection device for protecting an integrated circuit (IC) against an ESD event includes a first terminal coupled to an input/output pad of the IC, a second terminal coupled to a reference or ground voltage, a silicon-controlled rectifier (SCR) device having an anode connected to the first terminal and a cathode connected to the reference or ground voltage, and a pnp transistor coupled in parallel with the SCR device. The pnp transistor has an emitter coupled to the first terminal, a collector coupled to the second terminal, and a base coupled to a gate of the SCR. The pnp transistor includes a contact region formed at a first side of a substrate, the first contact region being surrounded by an STI layer formed at the first side of the substrate. An insulation structure is formed at an intersection of the first contact region and the STI layer.
POWER SEMICONDUCTOR DEVICE
A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.
Phase control thyristor
A thyristor is disclosed with a plurality of emitter shorts at points in the cathode region. The points define a Delaunay triangulation with a plurality of triangles. For a first subset of triangles a coefficient of variation of the values q.sub.T,l with lS.sub.1 is smaller than 0.1, and/or an absolute value of a skewedness of the geometric quantities q.sub.T,l with lS.sub.1 is smaller than 5, and/or a Kurtosis of the geometric quantities q.sub.T,l with lS.sub.1 is smaller than 20. For a second subset of triangles, a quotient of a standard deviation of the quantities q.sub.T,m with mS.sub.2 and a mean squared value of the geometric quantity q.sub.T,l with lS.sub.1 is less than 1, and/or a quotient of a number of triangles in the second subset and a number of triangles in the first subset is less than 1.010.sup.2.
Power semiconductor device
A power semiconductor device includes: a semiconductor body coupled to a first load terminal and a second load terminal, and includes: a first doped region of a second conductivity type electrically connected to the first load terminal; a recombination zone arranged at least within the first doped region; an emitter region of the second conductivity type electrically connected to the second load terminal; and a drift region of a first conductivity type arranged between the first doped region and the emitter region. The drift region and the first doped region enable the power semiconductor device to operate in: a conducting state during which a load current between the load terminals is conducted along a forward direction; in a forward blocking state during which a forward voltage applied between the load terminals is blocked; and in a reverse blocking state during which a reverse voltage applied between the terminals is blocked.
Silicon-controlled rectifiers having a cathode coupled by a contact with a diode trigger
Silicon-controlled rectifiers, electrostatic discharge circuits, and methods of fabricating a silicon-controlled rectifier for use in an electrostatic discharge circuit. A device structure for the silicon controlled rectifier includes a first well of a first conductivity type in a semiconductor layer, a second well of a second conductivity type in the semiconductor layer, a cathode coupled with the first well, and an anode coupled with the second well. First and second body contacts are coupled with the first well, and the first and second body contacts each have the first conductivity type. A triggering device may be coupled with the first body contact.
Method for producing a doped semiconductor layer
A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes a semiconductor substrate having a first surface and a second surface, first to eighth regions, a first thyristor, and a second thyristor. The seventh region with the impurity concentration higher than that of the first region is formed in the first region while being apart from the sixth region electrically connected to the gate electrode, and being electrically connected to the first electrode. The eighth region with the impurity concentration higher than that of the third region is formed in contact with the second surface side of the third region and the fourth region, and with the second surface, while being electrically connected to the fourth region by the second electrode. The seventh region has the impurity concentration higher than that of the first region. The eighth region has the impurity concentration higher than that of the third region.