A short-circuit semiconductor component comprises a semiconductor body, in which a rear-side base region of a first conduction type, an inner region of a second complementary conduction type, and a front-side base region of the first conduction type are disposed. The rear-side base region is electrically connected to a rear-side electrode, and the front-side base region is electrically connected to a front-side electrode. A turn-on structure, which is an emitter structure of the second conduction type, is embedded into the front-side base region and/or rear-side base region and is covered by the respective electrode and is electrically contacted with the electrode placed on the base region respectively embedding it. It can be turned on by a trigger structure which can be activated by an electrical turn-on signal. In the activated state, the trigger structure injects an electrical current surge into the semiconductor body, which irreversibly destroys a semiconductor junction.

A short-circuit semiconductor component comprises a semiconductor body, in which a rear-side base region of a first conduction type, an inner region of a second conduction type complementary to the first conduction type, and a front-side base region of the first conduction type are disposed. The rear-side base region is electrically connected to a rear-side electrode with a rear-side electrode width, and the front-side base region is electrically connected to a front-side electrode with a front-side electrode width. A turn-on structure with a turn-on structure width is embedded into the front-side and/or rear-side base region and is covered by the respective electrode. The turn-on structure is configured to be turned on depending on a supplied turn-on signal and to produce, on a one-off basis, an irreversible, low-resistance connection between the two electrodes. The ratio of the turn-on structure width to the respective electrode width is less than 1.

A thyristor, in particular a phase control thyristor, is disclosed with comprises: a) a semiconductor slab, in particular a semiconductor wave or die, in which a thyristor structure is formed, b) a cathode metallization formed on a cathode region on a cathode side surface of the semiconductor slab, c) a gate metallization formed on a gate region on the cathode side surface of the semiconductor slab, d) a plurality of N discrete emitter shorts, arranged at points P.sub.i in the cathode region, said points having point locations x.sub.i, with iε{1; . . . ; N}, e) the points P.sub.l defining a Delaunay triangulation comprising a plurality of triangles T.sub.j with jε{1; . . . ; M), wherein f) for a first subset of triangles T.sub.l with lεS.sub.1⊂{1; . . . ; M), g) with each triangle T.sub.l being characterized by a geometric quantity having values q.sub.T,l with lεS.sub.1⊂{1; . . . ; M), said geometric quantity having a mean value μ, and i) a coefficient of variation of the values q.sub.T,l with lεS.sub.1 is smaller than 0.1, preferably smaller than 0.05, and/or ii) an absolute value of a skewedness of the geometric quantities q.sub.T,l with lεS.sub.1 is smaller than 5, preferably smaller than 1, and/or iii) a Kurtosis of the geometric quantities q.sub.T,l with lεS.sub.1 is smaller than 20, preferably smaller than 10, and h) for a second subset of triangles T.sub.m with mεS.sub.2⊂S.sub.1, for which the respective geometric quantities q.sub.T,m with mεS.sub.2 deviate from the mean value by more than a predetermined amount, in particular by more than 30%, (1) a quotient of a standard deviation of the quantities q.sub.T,m with mεS.sub.2 and a mean squared value of the geometric quantity q.sub.T,l with lεS.sub.1 is less than 1 or less than 0.1, and/or a quotient of a number of triangles in the second subset and a number of triangles in the first subset is less than

A short-circuit semiconductor component comprises a semiconductor body, in which a rear-side base region of a first conduction type, an inner region of a second conduction type complementary to the first conduction type, and a front-side base region of the first conduction type are disposed. The rear-side base region is electrically connected to a rear-side electrode with a rear-side electrode width, and the front-side base region is electrically connected to a front-side electrode with a front-side electrode width. A turn-on structure with a turn-on structure width is embedded into the front-side and/or rear-side base region and is covered by the respective electrode. The turn-on structure is configured to be turned on depending on a supplied turn-on signal and to produce, on a one-off basis, an irreversible, low-resistance connection between the two electrodes. The ratio of the turn-on structure width to the respective electrode width is less than 1.

A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.

A short-circuit semiconductor component comprises a semiconductor body, in which a rear-side base region of a first conduction type, an inner region of a second complementary conduction type, and a front-side base region of the first conduction type are disposed. The rear-side base region is electrically connected to a rear-side electrode, and the front-side base region is electrically connected to a front-side electrode. A turn-on structure, which is an emitter structure of the second conduction type, is embedded into the front-side base region and/or rear-side base region and is covered by the respective electrode and is electrically contacted with the electrode placed on the base region respectively embedding it. It can be turned on by a trigger structure which can be activated by an electrical turn-on signal. In the activated state, the trigger structure injects an electrical current surge into the semiconductor body, which irreversibly destroys a semiconductor junction.

A power chip, includes a metal region; a wafer region. The wafer region includes at least one first partition, forming a first power switch; and at least one second partition, forming a second power switch. The first power switch and the second power switch are electrically connected, a total number of the at least one first partition and the at least one second partition is not less than 3, and the at least one first partition and the at least one second partition are disposed alternatively along a curve.

A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.

A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.

An ESD protection device for protecting an integrated circuit against an ESD event includes a first terminal coupled to an input/output pad of the IC, a second terminal coupled to a reference or ground voltage, a silicon-controlled rectifier device having an anode connected to the first terminal and a cathode connected to the reference or ground voltage, and a pnp transistor coupled in parallel with the SCR device. The pnp transistor has an emitter coupled to the first terminal, a collector coupled to the second terminal, and a base coupled to a gate of the SCR. The pnp transistor includes a contact region formed at a first side of a substrate, the first contact region being surrounded by an STI layer formed at the first side of the substrate. An insulation structure is formed at an intersection of the first contact region and the STI layer.