The light-emitting device includes a thin film transistor having a channel layer made of a first n-type semiconductor; a cathode electrically connected to a drain of the thin film transistor and made of a second n-type semiconductor; an anode facing the cathode; and a light-emitting layer provided between the cathode and the anode.

A thin film transistor includes an active layer including a first portion having a first thickness and a second portion having a second thickness greater than the first thickness, a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion, a gate insulating layer arranged on the capping layer, a gate electrode on the active layer, wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer, and a source electrode and a drain electrode connected to the active layer.

An array substrate, a display panel including the array substrate, and a fabrication method of the array substrate are provided. The array substrate includes a base substrate, a light-shielding portion, a thin-film transistor and a capacitor. The light-shielding portion is formed on a first surface of the base substrate. The thin-film transistor is formed on a side of the light-shielding portion away from the base substrate, and includes an active layer. The capacitor is formed on the first surface of the base substrate, and includes a first capacitive electrode and a second capacitive electrode. The first capacitive electrode and the second capacitive electrode are at least partially arranged opposite to each other in a direction perpendicular to the first surface of the base substrate. The first capacitive electrode is provided in a same layer as the light-shielding portion.

A transistor may be provided by forming, in a forward order or in a reverse order, a gate electrode, a semiconducting metal oxide liner, a gate dielectric, and an active layer over a substrate, and by forming a source electrode and a drain electrode on end portions of the active layer. The semiconducting metal oxide liner comprises a thin semiconducting metal oxide material that functions as a hydrogen barrier material.

A photoelectric conversion panel includes: a thin film transistor; a first organic film formed in an upper layer with respect to the thin film transistor; a photoelectric conversion element formed in an upper layer with respect to the first organic film; a first inorganic layer formed so as to cover at least a part of the photoelectric conversion element, and to cover the first organic film; and a second organic film formed in an upper layer with respect to the first organic film, wherein the first inorganic layer is provided with a first through hole connecting the first organic film and the second organic film.

Disclosed are an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a gate insulating layer, an active layer, source-drain electrodes, a first conductive layer and an isolation insulating layer), the source-drain electrodes are in contact with the active layer, the gate insulating layer is located on a surface of the active layer, the isolation insulating layer) is located on another surface of the active layer, and the isolation insulating layer at least includes a first hollow structure in a contacting region of the active layer and the source-drain electrodes; the isolation insulating layer is configured to isolate residue of the active layer located outside a region where the first hollow structure is located from contacting the first conductive layer.

Embodiments of the invention include metal oxide metal field effect transistors (MOMFETs) and methods of making such devices. In embodiments, the MOMFET device includes a source and a drain with a channel disposed between the source and the drain. According to an embodiment, the channel has at least one confined dimension that produces a quantum confinement effect in the channel. In an embodiment, the MOMFET device also includes a gate electrode that is separated from the channel by a gate dielectric. According to embodiments, the band-gap energy of the channel may be modulated by changing the size of the channel, the material used for the channel, and/or the surface termination applied to the channel. Embodiments also include forming an type device and a P-type device by controlling the work-function of the source and drain relative to the conduction band and valance band energies of the channel.

A display device is provided. The display device includes a base; a gate conductor disposed directly on the base and including a gate line and a gate electrode; a gate insulating layer disposed on the gate conductor and including an overlap portion, which overlaps with the gate conductor, and a non-overlap portion, which is connected to the overlap portion, does not overlap with the gate conductor, and is spaced apart from the base; and a semiconductor pattern disposed on the gate insulating layer and overlapping with the gate electrode, wherein edges of the gate insulating layer project further than edges of the gate conductor and edges of the semiconductor pattern.

A semiconductor element includes a high-resistivity substrate that includes a β-Ga.sub.2O.sub.3-based single crystal including an acceptor impurity, an undoped β-Ga.sub.2O.sub.3-based single crystal layer formed on the high-resistivity substrate, and an n-type channel layer that includes a side surface surrounded by the undoped β-Ga.sub.2O.sub.3-based single crystal layer. The undoped β-Ga.sub.2O.sub.3-based single crystal layer includes an element isolation region.

The thin film transistor includes a first insulating layer provided on a substrate; a source electrode and a drain electrode that are provided on the first insulating layer; a semiconductor layer provided so as to cover the first insulating layer, the source electrode, and the drain electrode; a second insulating layer provided on the semiconductor layer; and a gate electrode provided on the second insulating layer, in which the first insulating layer is formed of a hydrophilic/hydrophobic material and has a recess portion, and the source electrode and the drain electrode are provided so as to fill the recess portion of the first insulating layer.