A memory device is provided. The memory device includes a plurality of memory cells. Each memory cell includes a latch circuit formed of N-type field effect transistors (NFETs) and P-type field effect transistors (PFETs). The NFETs are formed at a surface of a semiconductor substrate, and the PFETs are disposed at an elevated level over the NFETs.

A display substrate and a manufacturing method, and a display device are provided. The display substrate includes a base substrate including a display region and a periphery region; and a shift register unit, a first power line and a second power line; an orthographic projection of the first power line on the base substrate is on a side of an orthographic projection of the shift register unit on the base substrate closer to the display region, an orthographic projection of the second power line on the base substrate is on a side of the orthographic projection of the shift register unit on the base substrate away from the display region, and the orthographic projection of the shift register unit on the base substrate is between the orthographic projection of the first power line on the base substrate and the orthographic projection of the second power line on the base substrate.

A method for manufacturing an array substrate is provided. The array substrate, by providing a black matrix and a color resist layer on the array substrate and providing the color resist layer on the TFT layer, prevents bad influences on the color resist layer caused by a high temperature TFT process so as to provide a liquid crystal panel with improved displaying quality. The method includes, firstly, forming a black matrix on a substrate, and secondly, implementing a TFT manufacture process on the black matrix, and then forming a color resist layer after the TFT manufacture process. Accordingly, forming both the black matrix and the color resist layer on the array substrate can be achieved, where the color resist layer is formed after the TFT manufacture process to prevent bad phenomenon caused by the high temperature of the TFT process.

An imaging device that does not need a lens is provided. The imaging device includes a first layer, a second layer, and a third layer. The second layer is positioned between the first layer and the third layer. The first layer includes a diffraction grating. The second layer includes a photoelectric conversion element. The third layer includes a transistor including an oxide semiconductor in an active layer.

Provided is a display control element which can improve a display device in driving speed. A display control element (A) includes a semiconductor layer (l) having a counter surface (p) connected to a gate line (GL), a source electrode (s) provided on a side of the semiconductor layer (l) and connected to a source line (SL), and drain electrodes (da and db) provided on the side of the semiconductor layer (l) and connected to the same pixel (P). The gate surface, the source electrode (s), and each of the drain electrodes constitute a single thin film transistor.

Provided are an ultrasonic fingerprint identification circuit, a driving method thereof, and a display device. The ultrasonic fingerprint identification circuit comprises fingerprint identification units each including an ultrasonic fingerprint identification sensor connected to a first node; a control module connected to a composite signal line, a first control signal line and the first node and configured to provide a reset potential to the first node and to provide a pull-up potential to the first node in response to a first level provided by the composite signal line; a reading module connected to a second control signal line, the first node and a reading signal line, and configured to read a detection signal of the first node. The first control signal line connected to one fingerprint identification unit is reused as the second control signal line connected to another fingerprint identification unit.

An electronic device including a first substrate, a semiconductor layer, a second substrate and a color filter is disclosed. The first substrate has a peripheral region. The semiconductor layer is disposed on the first substrate in the peripheral region. The second substrate is opposite to the first substrate. The color filter is disposed between the first substrate and the second substrate and in the peripheral region of the first substrate, and the color filter overlaps the semiconductor layer.

The present disclosure provides a thin film transistor, a manufacturing method of the thin film transistor and a display device, configured to improve electrical property of the thin film transistor. The thin film transistor includes: an active layer, including a source and drain contact region and a channel region; a metal barrier layer, covering the source and drain contact region; a first gate insulating layer, at least covering the channel region and exposing the metal barrier layer; a gate, on the first gate insulating layer and covering the channel region; an inner layer dielectric layer, on the gate and having a through hole exposing the metal barrier layer; and a source and drain, on the inner layer dielectric layer and in contact with the metal barrier layer through the through hole.

A thin-film transistor substrate includes a semiconductor layer disposed on a substrate, a gate insulating layer disposed on the semiconductor layer, a first electrode that at least partly overlaps the semiconductor layer, wherein the gate insulating layer is disposed between the first electrode and the semiconductor layer, a plurality of thin-film layers disposed on the first electrode, and a second electrode that at least partly overlaps the first electrode, wherein the plurality of thin-film layers are disposed between the second electrode and the first electrode, wherein at least one of the plurality of thin-film layers includes amorphous silicon.

The invention provides a display device and a method of manufacturing a thin film transistor. The method of manufacturing a thin film transistor comprises: (A) providing a substrate; (B) forming a light shielding layer on the substrate, and patterning the light shielding layer to form a patterned light shielding layer; (C) forming a buffer layer on the substrate; (D) forming a semiconductor layer on the substrate, and patterning the semiconductor layer to form a patterned semiconductor layer; (E) forming an insulating layer on the substrate; and (F) forming a conductive layer on the substrate, and patterning the conductive layer to form a patterned conductive layer; wherein the same mask is used for patterning the light shielding layer and the semiconductor layer. Photoelectric effect of the thin film transistor outside the display region can be effectively avoided, while reducing the number of masks in the production process.