A memory device is provided. The memory device includes a plurality of memory cells. Each memory cell includes a latch circuit formed of N-type field effect transistors (NFETs) and P-type field effect transistors (PFETs). The NFETs are formed at a surface of a semiconductor substrate, and the PFETs are disposed at an elevated level over the NFETs.

A display apparatus and a method of manufacturing the same are provided. According to an embodiment, a display apparatus includes: a substrate; a thin-film transistor located on the substrate; and a buffer layer, a conductive layer, and an insulating layer sequentially located from the substrate between the substrate and the thin-film transistor, and a thickness of the insulating layer is less than a thickness of the buffer layer.

A display panel includes a base layer, a signal line which is disposed on the base layer and includes a first layer including aluminum and a second layer disposed directly on the first layer and consisting of niobium, a first thin film transistor connected to the signal line, a second thin film transistor disposed on the base layer, a capacitor electrically connected to the second thin film transistor, and a light emitting element electrically connected to the second thin film transistor.

A display apparatus having a connection electrode which crosses a bending area may be provided. The connection electrode may be disposed on a device substrate including a bending area between a display area and a pad area. The connection electrode may connect the display area and the pad area across the bending area. The connection electrode may have a stacked structure of the lower connecting electrode and the upper connecting electrode. A light-emitting device, an encapsulating element and a touch electrode may be sequentially stacked on the display area of the device substrate. The upper connecting electrode may include the same material as the touch electrode. Thus, in the display apparatus, the disconnection of the connection electrode due to bending stress and external impact may be reduced.

A display device includes a base substrate including a first substrate and a second substrate sequentially laminated, a lower semiconductor layer disposed on at least one of the first substrate and the second substrate, a buffer layer disposed on the base substrate, an active semiconductor layer disposed on the buffer layer and including a first active layer of a first transistor and a second active layer of a second transistor, a first insulating layer disposed on the active semiconductor layer, and a first conductive layer disposed on the first insulating layer and including a first gate electrode of the first transistor and a second gate electrode of the second transistor, wherein the lower semiconductor layer overlaps the first active layer, and does not overlap the second active layer.

A method for making an array substrate includes the following steps: forming a poly-silicon semiconductor layer on a substrate; forming a buffer layer on the substrate; depositing a first metal layer, and patterning the first metal layer to form gate electrodes for a driving TFT, a switch TFT, and a poly-silicon TFT; forming a first gate insulator layer; forming a second gate insulator layer; defining through holes passing through the buffer layer, the first gate insulator layer, and the second gate insulator layer to expose the poly-silicon semiconductor layer; depositing a metal oxide layer to form a first metal oxide semiconductor layer; and depositing a second metal layer to form source electrodes and drain electrodes for the driving TFT, the switch TFT, and the poly-silicon TFT.

An imaging device that does not need a lens is provided. The imaging device includes a first layer, a second layer, and a third layer. The second layer is positioned between the first layer and the third layer. The first layer includes a diffraction grating. The second layer includes a photoelectric conversion element. The third layer includes a transistor including an oxide semiconductor in an active layer.

Provided is a display control element which can improve a display device in driving speed. A display control element (A) includes a semiconductor layer (l) having a counter surface (p) connected to a gate line (GL), a source electrode (s) provided on a side of the semiconductor layer (l) and connected to a source line (SL), and drain electrodes (da and db) provided on the side of the semiconductor layer (l) and connected to the same pixel (P). The gate surface, the source electrode (s), and each of the drain electrodes constitute a single thin film transistor.

An organic light emitting display device includes a driving TFT on the substrate, a switching TFT on the substrate, and an organic light emitting diode. The driving TFT includes a first active layer formed of poly-Si, and at least a first part of an interlayer insulation layer on the first active layer. The interlayer insulation layer is formed of a first material including hydrogen. The switching TFT includes a second active layer, at least a second part of the interlayer insulation layer between the first active layer and the second active layer, and at least a part of a gate insulation layer between the second part of the interlayer insulation layer and the second active layer. The gate insulation layer is formed from a second material different from the first material and blocking diffusion of hydrogen from the interlayer insulation layer to the second active layer.

A thin film transistor (TFT) substrate includes a TFT on the substrate. The TFT includes an active patterned layer which is made of a polycrystalline silicon, which includes a channel portion, a source portion and a drain portion, and in which protrusions are formed at boundaries between grains and recess spaces are formed between the protrusions. A barrier pattern film fills the recess spaces and forms a flat surface with the protrusions. A gate electrode is on a gate insulating layer located on the barrier pattern film and the protrusions and overlays or corresponds to the channel portion. A source electrode and a drain electrode are on the gate electrode and respectively contact the source portion and the drain portion.