A semiconductor device in which a transistor and a diode are formed on a common semiconductor substrate is provided. The semiconductor substrate includes a transistor region in which a transistor is formed and a diode region in which a diode is formed. At least one first electrode on a second main surface side of the transistor region and at least one second electrode on a second main surface side of the diode region are made of different materials.

A semiconductor device includes a main element and a sense element. Each of the main element and the sense element includes a drift layer, a base layer, an emitter region, a gate insulation film, a gate electrode, and a rear surface layer. The base layer is on the drift layer. The emitter region is at a surface layer portion of the base layer. The gate insulation film is disposed at a surface of the base layer between the emitter region and the drift layer. The gate electrode is on the gate insulation film. The rear surface layer faces the base layer with the drift layer between the rear surface layer and the base layer. The rear surface layer in the main element includes a collector layer. The rear surface layer in the sense element includes a low-impurity layer having smaller amount of impurities than the collector layer.

In one embodiment, an asymmetric TVS device may include a semiconductor substrate, comprising an inner region, the inner region having a first polarity, and a first surface region, disposed on a first surface of the semiconductor substrate, the first surface region comprising a second polarity, opposite the first polarity. The asymmetric TVS device may also include a second surface region, comprising the second polarity, and disposed on a second surface of the semiconductor substrate, opposite the first surface, wherein the first surface region comprises a first dopant concentration, and wherein the second surface region comprises a second dopant concentration, greater than the first dopant concentration.

Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.

Exemplary methods of forming a semiconductor structure may include forming a doped silicon layer on a semiconductor substrate. A level of doping may be increased at an increasing distance from the semiconductor substrate. The methods may include etching the doped silicon layer to define a trench extending to the semiconductor substrate. The doped silicon layer may define a sloping sidewall of the trench. The trench may be characterized by a depth of greater than or about 30 μm. The methods may include lining the trench with a first oxide material. The methods may include depositing a second oxide material within the trench. The methods may include forming a contact to produce a power device.

Provided is a semiconductor device including: an active portion provided thereon; a plurality of trench portions each including a gate conductive portion and arranged in a array direction while extending in a extending direction in the active portion, a conductive portion shape ratio of a trench length to a width of the gate conductive portion array direction being 1,000 or more; a first control pad protruding toward an inner side of the semiconductor substrate from a first outer peripheral side of the semiconductor substrate in a top view; and a first well region provided below the first control pad and to cover the first control pad in the top view, in which a shortest distance between the first well region and a trench center position as a center of a length of the plurality of trench portions in the extending direction in the top view is 1,000 μm or more.

A semiconductor device is formed having a deep trench, a conductive material disposed in the deep trench, and a dielectric disposed within the deep trench and separating the conductive material from surfaces of the deep trench. The conductive material may be carbon, and may be formed by pyrolysis of an organic material such as a photoresist. The deep trench and the conductive material may be parts of a high-voltage termination of an active device of the semiconductor device. The conductive material may be floating or may be connected to an electrode of the active device.

Provided is a semiconductor device including: a transistor portion provided in a semiconductor substrate; and a diode portion provided in the semiconductor substrate, in which an area ratio of the transistor portion to the diode portion on a front surface of the semiconductor substrate is larger than 3.1 and smaller than 4.7. Provided is a semiconductor module including: a semiconductor device including a transistor portion and a diode portion provided in a semiconductor substrate; an external connection terminal electrically connected to the semiconductor device; and a coupling portion for electrically connecting the semiconductor device and the external connection terminal. The coupling portion may be in plane contact with a front surface electrode of the semiconductor device at a predetermined junction surface. An area ratio of the transistor portion to the diode portion may be larger than 2.8 and smaller than 4.7.

Provided is a semiconductor device including: a drift region of first conductivity type provided in a semiconductor substrate; a base region of second conductivity type provided in the semiconductor substrate; an emitter region of first conductivity type provided at a front surface of the semiconductor substrate; a contact region of second conductivity type provided on the base region and having a higher doping concentration than the base region; a contact trench portion provided at the front surface of the semiconductor substrate; a first barrier layer provided at a side wall and a bottom surface of the contact trench portion; and a second barrier layer provided in contact with the contact region at the side wall of the contact trench portion.

A semiconductor device includes a semiconductor substrate, a transistor section, a diode section, and a boundary section provided between the transistor section and the diode section in the semiconductor substrate. The transistor section has gate trench portions which are provided from an upper surface of the semiconductor substrate to a position deeper than that of an emitter region, and to each of which a gate potential is applied. An upper-surface-side lifetime reduction region is provided on the upper surface side of the semiconductor substrate in the diode section and a partial region of the boundary section, and is not provided in a region that is overlapped with the gate trench portion in the transistor section in a surface parallel to the upper surface of the semiconductor substrate.