Patent classifications
H01L2924/0509
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
The present invention relates to a semiconductor structure and method of forming the same. The semiconductor structure includes a first substrate and a first bonding layer on a surface of the first substrate, and the material of first bonding layer includes dielectric materials of silicon, nitrogen and carbon, and an atomic concentration of carbon in the first bonding layer gradually increases along with an increase of thickness of the first bonding layer from the surface of first substrate and reaches a maximum atomic concentration of carbon at a surface of the first bonding layer.
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
The present invention relates to a semiconductor structure and method of forming the same. The semiconductor structure includes a first substrate and a first bonding layer on a surface of the first substrate, and the material of first bonding layer includes dielectric materials of silicon, nitrogen and carbon, and an atomic concentration of carbon in the first bonding layer gradually increases along with an increase of thickness of the first bonding layer from the surface of first substrate and reaches a maximum atomic concentration of carbon at a surface of the first bonding layer.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip, where a first conductive connection wire of the first chip is connected to a first conductive contact pad, a second conductive connection wire of the second chip is connected to a second conductive contact pad, the first conductive contact pad includes a first conductor group and a first connection group, and the second conductive contact pad includes a second conductor group and a second connection group.
Light-emitting device
A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.
Light-emitting device
A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.
Redistribution layer metallic structure and method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
Redistribution layer metallic structure and method
The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
Thermal management solutions for embedded integrated circuit devices
An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and a heat dissipation device in thermal contact with the integrated circuit device, wherein a first portion of the heat dissipation device extends into the substrate and wherein a second portion of the heat dissipation device extends over the substrate. In one embodiment, the heat dissipation device may comprise the first portion of the heat dissipation device formed from metallization within the substrate.
Thermal management solutions for embedded integrated circuit devices
An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and a heat dissipation device in thermal contact with the integrated circuit device, wherein a first portion of the heat dissipation device extends into the substrate and wherein a second portion of the heat dissipation device extends over the substrate. In one embodiment, the heat dissipation device may comprise the first portion of the heat dissipation device formed from metallization within the substrate.
HETEROGENOUS BONDING LAYERS FOR DIRECT SEMICONDUCTOR BONDING
A first semiconductor device and a second semiconductor device may be directly bonded using heterogeneous bonding layers. A first bonding layer may be formed on the first semiconductor device and the second bonding layer may be formed on the second semiconductor device. The first bonding layer may include a higher concentration of hydroxy-containing silicon relative to the second bonding layer. The second bonding layer may include silicon with a higher concentration of nitrogen relative to the first bonding layer. An anneal may be performed to cause a dehydration reaction that results in decomposition of the hydroxy components of the first bonding layer, which forms silicon oxide bonds between the first bonding layer and the second bonding layer. The nitrogen in the second bonding layer increases the effectiveness of the dehydration reaction and the effectiveness and strength of the bond between the first bonding layer and the second bonding layer.