A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

This document discloses techniques, apparatuses, and systems for semiconductor device interconnects formed through volumetric expansion. A semiconductor assembly is described that includes two semiconductor dies. The first semiconductor die and the second semiconductor die are bonded at a dielectric layer of the first semiconductor die and a dielectric layer of the second semiconductor die to create one or more interconnect openings. The first semiconductor die includes a reservoir of conductive material located adjacent to the one or more interconnect openings and having a width greater than a width of the one or more interconnect openings. The reservoir of conductive material is heated to volumetrically expand the reservoir of conductive material through the one or more interconnect openings to form one or more interconnects electrically coupling the first semiconductor die and the second semiconductor die. In this way, a connected semiconductor device may be assembled.

A semiconductor package includes a package substrate including a first pad; a first memory device arranged on the package substrate and including first and second semiconductor chips stacked in a vertical direction; and a first chip connecting member electrically connecting the first semiconductor chip to the package substrate. The first semiconductor chip includes a first cell structure; a first peripheral circuit structure; a first bonding pad; and a first input/output pad electrically connected to the first pad of the package substrate through the first chip connection member. The second semiconductor chip includes a second cell structure; and a second bonding pad connected to the first bonding pad. A part of the first peripheral circuit structure protrudes from a sidewall of the second semiconductor chip so as not to overlap the second semiconductor chip.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a package substrate including a first pad; a first memory device arranged on the package substrate and including first and second semiconductor chips stacked in a vertical direction; and a first chip connecting member electrically connecting the first semiconductor chip to the package substrate. The first semiconductor chip includes a first cell structure; a first peripheral circuit structure; a first bonding pad; and a first input/output pad electrically connected to the first pad of the package substrate through the first chip connection member. The second semiconductor chip includes a second cell structure; and a second bonding pad connected to the first bonding pad. A part of the first peripheral circuit structure protrudes from a sidewall of the second semiconductor chip so as not to overlap the second semiconductor chip.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.