Patent classifications
H01L2924/0582
TIN OR TIN-ALLOY PLATING LIQUID, BUMP FORMING METHOD, AND CIRCUIT BOARD PRODUCTION METHOD
This tin or tin-alloy plating liquid contains (A) a soluble salt including at least a stannous salt; (B) an acid selected from an organic acid and an inorganic acid, or a salt thereof; (C) a surfactant; (D) a leveling agent; and (E) an additive, wherein the surfactant is a compound (C1) represented by Formula (1) and/or a compound (C2) represented by Formula (2).
##STR00001##
In Formulas (1) and (2), R is an alkyl group having 7 to 13 carbon atoms, m is 5 to 11, n is 1 to 3, and m and n are different from each other.
TIN OR TIN-ALLOY PLATING LIQUID, BUMP FORMING METHOD, AND CIRCUIT BOARD PRODUCTION METHOD
This tin or tin-alloy plating liquid contains (A) a soluble salt including at least a stannous salt; (B) an acid selected from an organic acid and an inorganic acid, or a salt thereof; (C) a surfactant; (D) a leveling agent; and (E) an additive, wherein the surfactant is a compound (C1) represented by Formula (1) and/or a compound (C2) represented by Formula (2).
##STR00001##
In Formulas (1) and (2), R is an alkyl group having 7 to 13 carbon atoms, m is 5 to 11, n is 1 to 3, and m and n are different from each other.
Tin or tin alloy plating solution and bump forming method
This tin or tin alloy plating solution includes a soluble salt including at least a stannous salt (A), an acid selected from an organic acid and an inorganic acid or a salt thereof (B), a surfactant (C), benzalacetone (D), and a solvent (E), wherein the plating solution is used to form a pattern in which bump diameters are different from each other on a base material, an amount of the benzalacetone (D) is 0.05 g/L to 0.2 g/L, a mass ratio (C/D) of the surfactant (C) to the benzalacetone (D) is 10 to 200, and a mass ratio (E/D) of the solvent (E) to the benzalacetone (D) is 10 or more.
Tin or tin alloy plating solution and bump forming method
This tin or tin alloy plating solution includes a soluble salt including at least a stannous salt (A), an acid selected from an organic acid and an inorganic acid or a salt thereof (B), a surfactant (C), benzalacetone (D), and a solvent (E), wherein the plating solution is used to form a pattern in which bump diameters are different from each other on a base material, an amount of the benzalacetone (D) is 0.05 g/L to 0.2 g/L, a mass ratio (C/D) of the surfactant (C) to the benzalacetone (D) is 10 to 200, and a mass ratio (E/D) of the solvent (E) to the benzalacetone (D) is 10 or more.
TIN OR TIN ALLOY PLATING SOLUTION AND BUMP FORMING METHOD
This tin or tin alloy plating solution includes a soluble salt including at least a stannous salt (A), an acid selected from an organic acid and an inorganic acid or a salt thereof (B), a surfactant (C), benzalacetone (D), and a solvent (E), wherein the plating solution is used to form a pattern in which bump diameters are different from each other on a base material, an amount of the benzalacetone (D) is 0.05 g/L to 0.2 g/L, a mass ratio (C/D) of the surfactant (C) to the benzalacetone (D) is 10 to 200, and a mass ratio (E/D) of the solvent (E) to the benzalacetone (D) is 10 or more.
TIN OR TIN ALLOY PLATING SOLUTION AND BUMP FORMING METHOD
This tin or tin alloy plating solution includes a soluble salt including at least a stannous salt (A), an acid selected from an organic acid and an inorganic acid or a salt thereof (B), a surfactant (C), benzalacetone (D), and a solvent (E), wherein the plating solution is used to form a pattern in which bump diameters are different from each other on a base material, an amount of the benzalacetone (D) is 0.05 g/L to 0.2 g/L, a mass ratio (C/D) of the surfactant (C) to the benzalacetone (D) is 10 to 200, and a mass ratio (E/D) of the solvent (E) to the benzalacetone (D) is 10 or more.
METHOD OF INTERCONNECTING SEMICONDUCTOR DEVICES AND ASSEMBLY OF INTERCONNECTED SEMICONDUCTOR DEVICES
The present disclosure relates to a method of interconnecting semiconductor devices and an assembly of interconnected semiconductor devices. The method comprises forming a metal layer on a first connection surface of the first semiconductor device, and forming an oxidant layer on a second connection surface of the second semiconductor device, the first connection surface including first coupling pads, the second connection surface including the second coupling pads. The method further comprises aligning the first connecting pads and respective ones of the second connecting pads to each other, pressing together the metal layer and the oxidant layer, and reacting the metal layer with the oxidant layer under target condition to form a bonding layer. The bonding layer first regions, second regions, and third regions that are conductive regions, and a fourth region that is a nonconductive adhesive region. The method of interconnecting semiconductor devices allows alignment errors, improves yield, and reduces cost.