An anisotropic conductive film can reduce the conduction resistance of an anisotropic conductively connected connection structure, and can reliably suppress the occurrence of short-circuits. The film has a structure wherein insulating particle-including conductive particles, wherein insulating particles adhere to the surfaces of conductive particles, are distributed throughout an insulating resin layer. In the insulating particle-including conductive particles, a number of insulating particles in contact with the conductive particles with respect to a film thickness direction is lower than with respect to a film planar direction. Preferably, a number of the insulating particles overlapping with the conductive particles when one of a front and rear film surface of the anisotropic conductive film is viewed in plan view is lower than a number of the insulating particles overlapping with the conductive particles when the other of the film surfaces is viewed in plan view.

An anisotropic conductive film can reduce the conduction resistance of an anisotropic conductively connected connection structure, and can reliably suppress the occurrence of short-circuits. The film has a structure wherein insulating particle-including conductive particles, wherein insulating particles adhere to the surfaces of conductive particles, are distributed throughout an insulating resin layer. In the insulating particle-including conductive particles, a number of insulating particles in contact with the conductive particles with respect to a film thickness direction is lower than with respect to a film planar direction. Preferably, a number of the insulating particles overlapping with the conductive particles when one of a front and rear film surface of the anisotropic conductive film is viewed in plan view is lower than a number of the insulating particles overlapping with the conductive particles when the other of the film surfaces is viewed in plan view.

Provided is a technique suitable for multilayering thin semiconductor elements via adhesive bonding while avoiding wafer damage in a method of manufacturing a semiconductor device, the method in which semiconductor elements are multilayered through laminating wafers in which the semiconductor elements are fabricated. The method of the present invention includes bonding and removing. In the bonding step, a back surface 1b side of a thinned wafer 1T in a reinforced wafer 1R having a laminated structure including a supporting substrate S, a temporary adhesive layer 2, and the thinned wafer 1T is bonded via an adhesive to an element forming surface 3a of a wafer 3. A temporary adhesive for forming the temporary adhesive layer 2 contains a polyvalent vinyl ether compound, a compound having two or more hydroxy groups or carboxy groups and thus capable of forming a polymer with the polyvalent vinyl ether compound, and a thermoplastic resin. The adhesive contains a polymerizable group-containing polyorganosilsesquioxane. In the removing step, a temporary adhesion by the temporary adhesive layer 2 between the supporting substrate S and the thinned wafer 1T is released to remove the supporting substrate S.

A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.

A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.

In one example, an electronic device comprises a base substrate comprising a base substrate conductive structure, a first electronic component over a first side of the base substrate, an encapsulant over the first side of the base substrate, wherein the encapsulant contacts a lateral side of the electronic component, an interposer substrate over a first side of the encapsulant and comprising an interposer substrate conductive structure, and a vertical interconnect in the encapsulant and coupled with the base substrate conductive structure and the interposer substrate conductive structure. A first one of the base substrate or the interposer substrate comprises a redistribution layer (RDL) substrate, and a second one of the base substrate or the interposer substrate comprises a laminate substrate. Other examples and related methods are also disclosed herein.

A mounting apparatus for stacking and mounting two or more semiconductor chips at a plurality of locations on a substrate includes: a first mounting head for forming, at a plurality of locations on the substrate, temporarily stacked bodies in which two or more semiconductor chips are stacked in a temporarily press-attached state; and a second mounting head for forming chip stacked bodies by sequentially finally press-attaching the temporarily stacked bodies formed at the plurality of locations. The second mounting head includes: a press-attaching tool for heating and pressing an upper surface of a target temporarily stacked body to thereby finally press-attach the two or more semiconductor chips configuring the temporarily stacked body altogether; and one or more heat-dissipation tools having a heat-dissipating body which, by coming into contact with an upper surface of another stacked body positioned around the target temporarily stacked body, dissipates heat from the another stacked body.

A mounting apparatus for stacking and mounting two or more semiconductor chips at a plurality of locations on a substrate includes: a first mounting head for forming, at a plurality of locations on the substrate, temporarily stacked bodies in which two or more semiconductor chips are stacked in a temporarily press-attached state; and a second mounting head for forming chip stacked bodies by sequentially finally press-attaching the temporarily stacked bodies formed at the plurality of locations. The second mounting head includes: a press-attaching tool for heating and pressing an upper surface of a target temporarily stacked body to thereby finally press-attach the two or more semiconductor chips configuring the temporarily stacked body altogether; and one or more heat-dissipation tools having a heat-dissipating body which, by coming into contact with an upper surface of another stacked body positioned around the target temporarily stacked body, dissipates heat from the another stacked body.

This silver paste is used to form a silver paste layer by applying the silver paste directly on the surface of a copper or copper alloy member, and the silver paste includes a silver powder, a fatty acid silver salt, an aliphatic amine, a high-dielectric-constant alcohol having a dielectric constant of 30 or more, and a solvent having a dielectric constant of less than 30. The content of the high-dielectric-constant alcohol is preferably 0.01% by mass to 5% by mass when an amount of the silver paste is taken as 100% by mass.