Patent classifications
H01L2924/07811
CONNECTORS FOR MAKING CONNECTIONS BETWEEN ANALYTE SENSORS AND OTHER DEVICES
Glucose monitoring devices and related systems and methods, the glucose monitoring devices including a sensor electronics unit having a housing and a printed circuit board disposed within the housing, a transcutaneous glucose sensor assembly, and a conductive sensor connector. The printed circuit board includes a first electrical contact, the transcutaneous glucose sensor assembly includes a distal portion having a working electrode and proximal portion having a working-electrode contact in electrical communication with the working electrode, and the conductive sensor connector electrically connects the working-electrode contact with the first electrical contact. Further, the conductive sensor connector extends through a hole in the proximal portion of the transcutaneous glucose sensor assembly and through a hole in the printed circuit board.
CONNECTORS FOR MAKING CONNECTIONS BETWEEN ANALYTE SENSORS AND OTHER DEVICES
Glucose monitoring devices and related systems and methods, the glucose monitoring devices including a sensor electronics unit having a housing and a printed circuit board disposed within the housing, a transcutaneous glucose sensor assembly, and a conductive sensor connector. The printed circuit board includes a first electrical contact, the transcutaneous glucose sensor assembly includes a distal portion having a working electrode and proximal portion having a working-electrode contact in electrical communication with the working electrode, and the conductive sensor connector electrically connects the working-electrode contact with the first electrical contact. Further, the conductive sensor connector extends through a hole in the proximal portion of the transcutaneous glucose sensor assembly and through a hole in the printed circuit board.
Decoupling capacitor mounted on an integrated circuit die, and method of manufacturing the same
Electronic device package technology is disclosed. In one example, an electronic device comprises a die (18) having a bond pad (22); and a decoupling capacitor (14) mounted on the die (18) and electrically coupled to the die (18). A method for making an electronic device comprises mounting a decoupling capacitor (14) on a die (18); and electrically coupling the decoupling capacitor (14) to the die (18).
Test pad structure of chip
The present invention provides a test pad structure of chip, which comprises a plurality of first internal test pads, a plurality of second internal test pads, a plurality of first extended test pads, and a plurality of second extended test pads. The first internal test pads and the second internal test pads are disposed in a chip. The second internal test pads and the first internal test pads are spaced by a distance. The first extended test pads are connected with the first internal test pads. The second extended test pads are connected with the second internal test pads. The first extended test pads and the second extended test pads may increase the contact area to be contacted by probes. Signals or power are transmitted to the first internal test pads and the second internal test pads via the first extended test pads and the second extended test pads for the probes to test the chip.
Test pad structure of chip
The present invention provides a test pad structure of chip, which comprises a plurality of first internal test pads, a plurality of second internal test pads, a plurality of first extended test pads, and a plurality of second extended test pads. The first internal test pads and the second internal test pads are disposed in a chip. The second internal test pads and the first internal test pads are spaced by a distance. The first extended test pads are connected with the first internal test pads. The second extended test pads are connected with the second internal test pads. The first extended test pads and the second extended test pads may increase the contact area to be contacted by probes. Signals or power are transmitted to the first internal test pads and the second internal test pads via the first extended test pads and the second extended test pads for the probes to test the chip.
LIGHT-EMITTING DEVICE WITH IMPROVED FLEXURAL RESISTANCE AND ELECTRICAL CONNECTION BETWEEN LAYERS, PRODUCTION METHOD THEREFOR, AND DEVICE USING LIGHT-EMITTING DEVICE
A light-emitting device includes a pair of light-transmissive insulator sheets disposed opposite to each other and two types of light-transmissive electroconductive layers disposed on a common one of or separately on one and the other of the pair of light-transmissive insulator sheets, and at least one light-emitting semiconductor each provided with a cathode and an anode which are individually and electrically connected to the two types of the light-transmissive electroconductive layers. The electrical connection and mechanical bonding between the members are improved by a light-transmissive elastomer which is between the pair of light-transmissive insulator sheets. A method in which a light-emitting semiconductor element and a light-transmissive electroconductive member are subjected to vacuum hot-pressing.
LIGHT-EMITTING DEVICE WITH IMPROVED FLEXURAL RESISTANCE AND ELECTRICAL CONNECTION BETWEEN LAYERS, PRODUCTION METHOD THEREFOR, AND DEVICE USING LIGHT-EMITTING DEVICE
A light-emitting device includes a pair of light-transmissive insulator sheets disposed opposite to each other and two types of light-transmissive electroconductive layers disposed on a common one of or separately on one and the other of the pair of light-transmissive insulator sheets, and at least one light-emitting semiconductor each provided with a cathode and an anode which are individually and electrically connected to the two types of the light-transmissive electroconductive layers. The electrical connection and mechanical bonding between the members are improved by a light-transmissive elastomer which is between the pair of light-transmissive insulator sheets. A method in which a light-emitting semiconductor element and a light-transmissive electroconductive member are subjected to vacuum hot-pressing.
INTERDIGITATED OUTWARD AND INWARD BENT LEADS FOR PACKAGED ELECTRONIC DEVICE
An electronic device includes a package structure, a first lead and a second lead. The first lead has a first portion extending outward from a side of the package structure and downward, and a second portion extending outward from the first portion away from the package side. The second lead has a first portion extending outward from the package side and downward, and a second portion extending inward from the first portion toward the package side, and a distal end of the second lead is spaced from the package side.
Power module package and method of manufacturing the same
A method can include coupling a semiconductor chip and an electrode with a substrate. Bottom and top mold die can be use, where the top mold die define a first space and a second space that is separated from the first space. The method can include injecting encapsulation material to form an encapsulation member coupled to and covering at least a portion of the substrate. The encapsulation member can include a housing unit housing the electrode. The electrode can have a conductive sidewall exposed to, and not in contact with the encapsulation member, such that there is open space between the conductive sidewall of the electrode and the encapsulation member from an uppermost surface to a bottommost surface of the encapsulation member, the substrate can having a portion exposed within the open space, and the encapsulation member can have an open cross-section perpendicular to an upper surface of the substrate.
Semiconductor package
Disclosed is a semiconductor package comprising a semiconductor chip, a first chip pad on a bottom surface of the semiconductor chip and adjacent to a first lateral surface in a first direction of the semiconductor chip, the first lateral surface separated from the first chip pad from a plan view in a first direction, and a first lead frame coupled to the first chip pad. The first lead frame includes a first segment on a bottom surface of the first chip pad and extending from the first chip pad in a second direction opposite to the first direction and away from the first lateral surface of the semiconductor chip, and a second segment which connects to a first end of the first segment and then extends along the first direction to extend beyond the first lateral surface of the semiconductor chip after passing one side of the first chip pad, when viewed in the plan view.