H01L2924/10346

Multi-zone radio frequency transistor amplifiers

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Radio frequency transistor amplifiers having leadframes with integrated shunt inductors and/or direct current voltage source inputs

A packaged radio frequency transistor amplifier includes a package housing, an RF transistor amplifier die that is mounted within the package housing, a first capacitor die that is mounted within the package housing, an input leadframe that extends through the package housing to electrically connect to a gate terminal of the RF transistor amplifier die, and an output leadframe that extends through the package housing to electrically connect to a drain terminal of the RF transistor amplifier die. The output leadframe includes an output pad region, an output lead that extends outside of the package housing, and a first arm that extends from one of the output pad region and the output lead to be adjacent the first capacitor die.

Wafer structure and method for wafer dicing

The semiconductor die includes a base body, protruding portions and bonding pads. The base body has sidewalls. The protruding portions are laterally protruding from the sidewalls respectively. The bonding pads are disposed on the protruding portions respectively. The wafer dicing method includes following operations. Chips are formed on a semiconductor wafer. Bonding pads are formed on a border line between every two of the adjacent chips. A scribe line is formed and disposed along the bonding pads. A photolithographic pattern is formed on a top surface of the semiconductor wafer to expose the scribe line. The scribe line is etched to a depth in the semiconductor wafer substantially below the top surface layer to form an etched pattern. A back surface of the semiconductor wafer is thinned until the etched pattern in the wafer substrate is exposed.

METHOD FOR PERMANENTLY BONDING WAFERS

This invention relates to a method for bonding of a first contact surface of a first substrate to a second contact surface of a second substrate with the following steps, especially the following sequence: forming a first reservoir in a surface layer on the first contact surface and a second reservoir in a surface layer on the second contact surface, the surface layers of the first and second contact surfaces being comprised of respective native oxide materials of one or more second educts respectively contained in reaction layers of the first and second substrates, partially filling the first and second reservoirs with one or more first educts; and reacting the first educts filled in the first reservoir with the second educts contained in the reaction layer of the second substrate to at least partially strengthen a permanent bond formed between the first and second contact surfaces.

MULTI-ZONE RADIO FREQUENCY TRANSISTOR AMPLIFIERS

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

RADIO FREQUENCY TRANSISTOR AMPLIFIERS HAVING LEADFRAMES WITH INTEGRATED SHUNT INDUCTORS AND/OR DIRECT CURRENT VOLTAGE SOURCE INPUTS
20210408978 · 2021-12-30 ·

A packaged radio frequency transistor amplifier includes a package housing, an RF transistor amplifier die that is mounted within the package housing, a first capacitor die that is mounted within the package housing, an input leadframe that extends through the package housing to electrically connect to a gate terminal of the RF transistor amplifier die, and an output leadframe that extends through the package housing to electrically connect to a drain terminal of the RF transistor amplifier die. The output leadframe includes an output pad region, an output lead that extends outside of the package housing, and a first arm that extends from one of the output pad region and the output lead to be adjacent the first capacitor die.

Light emitting device
11367994 · 2022-06-21 · ·

A light emitting device includes: a base including: a main body, and a frame disposed on an upper surface of the main body; one or more laser elements disposed on the upper surface of the main body and positioned inward of the frame; and a cover including: a support member that is fixed to an upper surface of the frame and that has an opening inside the frame, and a light transmissive portion that is fixed to the support member and that is disposed so as to close the opening. A first interface, between the light transmissive portion and the support member, is located inward of and lower than a second interface, between the support member and the frame. A portion of the support member that extends at least from an outermost end of the first interface to an innermost end of the second interface has a constant thickness.

Semiconductor Device with a Passivation Layer and Method for Producing Thereof

A semiconductor device includes a semiconductor body comprising a first surface and an edge surface, a contact electrode formed on the first surface and comprising an outer edge side, and a passivation layer section conformally covering the outer edge side of the contact electrode. The passivation layer section is a multi-layer stack comprising a first layer, a second layer, and a third layer. Each of the first, second and third layers include outer edge sides facing the edge surface and opposite facing inner edge sides. The outer edge side of the contact electrode is disposed laterally between the inner edge sides and the outer edge sides of each layer.

ELECTRONICS MODULE AND METHOD FOR PRODUCING IT

Electronic module (1) including an encapsulation (20), a carrier substrate (10) enclosed by the encapsulation (20) and having a component side (25) which has a first metallization layer (15) and on which at least one first electronic component (30) is arranged, wherein at least one second metallization layer (35) for at least one second electronic component (31), in particular for controlling the first electronic component (30), is provided on an outer side (A) of the encapsulation (2), wherein the encapsulation (20) has at least one plated-through hole (5) for electrical connection, in particular for direct electrical connection, of the first electronic component (30) and the second electronic component (31).

PACKAGING FOR RF TRANSISTOR AMPLIFIERS

RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.