A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

An object is to provide highly reliable semiconductor element bonding portion and semiconductor device that have high heat resistance and improved adhesion between a bonding material and a sealing resin. Provided is a semiconductor element bonding portion in which the semiconductor element 11 and an electrically conductive plate 123a are bonded to each other by a bonding layer 10 and the bonding layer 10 includes a metal nanoparticle sintered body 101 and a coupling agent 102 including an SH group.

An object is to provide highly reliable semiconductor element bonding portion and semiconductor device that have high heat resistance and improved adhesion between a bonding material and a sealing resin. Provided is a semiconductor element bonding portion in which the semiconductor element 11 and an electrically conductive plate 123a are bonded to each other by a bonding layer 10 and the bonding layer 10 includes a metal nanoparticle sintered body 101 and a coupling agent 102 including an SH group.

The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.

Magnetic regions of at least one of a chiplet or a receiving substrate are used to permit magnetically guided precision placement of a plurality of chiplets on the receiving substrate. In the present application, a solution containing dispersed chiplets is employed to facilitate the placement of the dispersed chiplets on bond pads that are present on a receiving substrate.

A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.

The object of the technique disclosed in the specification is to provide a technique in which the production cost is reduced without impairing the mechanical strength of the resin, and the heat radiation is improved. The semiconductor device relates to the technique disclosed in the specification includes an insulating substrate, a semiconductor element disposed on an upper surface of the insulating substrate, a case connected to the insulating substrate, such that the semiconductor element is accommodated inside thereof, and resin filled inside of the case, such that the semiconductor element is embedded, on the upper surface of the resin in the inside of the case, a first concave part is formed, the first concave part is formed at a position covering an entire of the semiconductor element in plan view.

According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.