A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

A distance between outermost parts of alignment chips in a direction normal to a surface of a substrate is different between a first direction and a second direction along terminal placement surfaces. The plurality of alignment chips include a first alignment chip fixed to a first metal pad, and a second alignment chip fixed to a second metal pad. The first alignment chip and the second alignment chip are oriented in different directions on the surface of the substrate. A semiconductor module includes a first side surface part extending in the second direction and facing the first alignment chip, and a groove part formed in a portion of the first side surface part. A portion of the second alignment chip is positioned in the groove part.

An optical sensor includes a substrate including a substrate main surface intersecting a thickness-wise direction, a light emitting element disposed on the substrate main surface, a light receiving element disposed on the substrate main surface, a transparent first cover disposed on the substrate main surface to cover the light emitting element, and a transparent second cover disposed on the substrate main surface to cover the light receiving element. The first cover and the second cover are spaced apart by a gap.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

An electronic package structure is provided. The electronic packaging structure includes a substrate, a conductive layer disposed on the substrate, an intermetallic compound disposed on the conductive layer, a stress buffering material disposed on the substrate and adjacent to the conductive layer, and an electronic device disposed on the conductive layer and the stress buffering material. The intermetallic compound is disposed between the electronic device and the conductive layer, between the electronic device and the stress buffering material, between the substrate and the stress buffering material, and between the conductive layer and the stress buffering material. A maximum thickness of the intermetallic compound disposed between the electronic device and the stress buffering material, between the substrate and the stress buffering material, and between the conductive layer and the stress buffering material is greater than the thickness of the intermetallic compound disposed between the electronic device and the conductive layer.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

The present invention pertains to a curable organopolysiloxane composition comprising at least (A) an organopolysiloxane having at least two alkenyl groups per module, (B) an organopolysiloxane resin represented by average unit formula: (R.sup.1.sub.3SiO.sub.1/2).sub.a(R.sup.1.sub.2SiO.sub.2/2).sub.b(R.sup.2SiO.sub.3/2).sub.c(SiO.sub.4/2).sub.d. In the formula, R.sup.1's are the same or different from each other, and represent a hydrogen atom or a monovalent hydrocarbon group not having an aliphatic unsaturated carbon bond but at least two of the R.sup.1's per molecule represent hydrogen atoms, R.sup.2 represents a monovalent hydrocarbon group not having an aliphatic unsaturated bond, and a, b, and c are numbers satisfying 0<a<1, 0<b<1, and 0c0.2, and 0<d<1, respectively, but are also numbers satisfying 0.6a/d 1.5, 1.5b/d3, and a+b+c+d=1, and (C) a catalyst for hydrosilylation reaction. This composition has excellent adhesiveness to a semiconductor element, and can form a cured product in which only a small number of bubbles are produced.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

A method includes bonding a first semiconductor chip on a second semiconductor chip, applying an etching process to the first semiconductor chip and the second semiconductor chip until a metal surface of the second semiconductor chip is exposed, wherein as a result of applying the etching process, an opening is formed in the first semiconductor chip and the second semiconductor chip and plating a conductive material in the opening to from a conductive plug.

A semiconductor device has a semiconductor die with a sensitive area. A dam wall is formed over the semiconductor die proximate to the sensitive area. In one embodiment, the dam wall has a vertical segment and side wings. The dam wall can have a plurality of rounded segments integrated with a plurality of vertical segments as a unitary body. Alternatively, the dam wall has a plurality of separate vertical segments arranged in two or more overlapping rows. A plurality of conductive posts is formed over the semiconductor die. An electrical component is disposed over the semiconductor die. The semiconductor die and electrical component are disposed over a substrate. An insulating layer is formed over the substrate outside the dam wall. An underfill material is deposited between the semiconductor die and substrate. The dam wall and insulating layer inhibit the underfill material from contacting any portion of the sensitive area.