H01L2924/13061

Package including fully integrated voltage regulator circuitry within a substrate
11527483 · 2022-12-13 · ·

Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.

SENSOR AND MANUFACTURING METHOD THEREOF
20170248590 · 2017-08-31 ·

Provided is a manufacturing method of a sensor including the following steps. A mold having a cavity is provided. At least one chip is disposed in the cavity. The chip has an active surface and a back surface opposite to each other. The active surface faces toward a bottom surface of the cavity. A polymer material is filled in the cavity to cover the back surface of the chip. A heat treatment is performed, such that the polymer material is solidified to form a polymer substrate. A mold release treatment is performed to isolate the polymer substrate from the cavity. A plurality of conductive lines are formed on a first surface of the polymer substrate. The conductive lines are electrically connected with the chip.

Heterostructure comprising a carbon nanomembrane
09735366 · 2017-08-15 · ·

A heterostructure comprising at least one carbon nanomembrane on top of at least one carbon layer, a method of manufacture of the heterostructure, and an electronic device, a sensor and a diagnostic device comprising the heterostructure. The heterostructure comprises at least one carbon nanomembrane on top of at least one carbon layer, wherein the at least one carbon nanomembrane has a thickness of 0.5 to 5 nm and the heterostructure has a thickness of 1 to 10 nm.

FULLY INTEGRATED VOLTAGE REGULATOR CIRCUITRY WITHIN A SUBSTRATE
20200006239 · 2020-01-02 ·

Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.

Sensor and manufacturing method thereof

Provided is a manufacturing method of a sensor including the following steps. A mold having a cavity is provided. At least one chip is disposed in the cavity. The chip has an active surface and a back surface opposite to each other. The active surface faces toward a bottom surface of the cavity. A polymer material is filled in the cavity to cover the back surface of the chip. A heat treatment is performed, such that the polymer material is solidified to form a polymer substrate. A mold release treatment is performed to isolate the polymer substrate from the cavity. A plurality of conductive lines are formed on a first surface of the polymer substrate. The conductive lines are electrically connected with the chip.

Semiconductor device and method of fabricating same

A semiconductor device comprising: an insulation substrate; an intrinsic semiconductor nanowire formed on the insulation substrate and having both ends doped in a p-type and an n-type, respectively and a region, which is not doped, between the doped region; doped region electrodes formed on each of the p-type doped region and the n-type doped region of the semiconductor nanowire; a lower insulation layer formed on an intrinsic region of the semiconductor nanowire; an intrinsic region electrode formed on a part of the lower insulation layer; and a metal or semiconductor nanoparticle region formed on the lower insulation layer and between the intrinsic region electrode and the doped region electrode and spaced apart from the electrodes.

Method for growing carbon nanotubes

A method of forming carbon nanotubes (CNTs) is disclosed. The method includes dispersing a plurality of substantially semiconductor pure carbon nanotube (CNT) seeds on a substrate to provide a seeded substrate, ozonating the seeded substrate to remove defects on end faces of the plurality of substantially semiconductor pure CNT seeds, and growing carbon extensions on the end faces of the plurality of substantially semiconductor pure CNTs seeds to form a plurality of substantially pure CNTs.

METHOD FOR GROWING CARBON NANOTUBES

A method of forming carbon nanotubes (CNTs) is disclosed. The method includes dispersing a plurality of substantially semiconductor pure carbon nanotube (CNT) seeds on a substrate to provide a seeded substrate, ozonating the seeded substrate to remove defects on end faces of the plurality of substantially semiconductor pure CNT seeds, and growing carbon extensions on the end faces of the plurality of substantially semiconductor pure CNTs seeds to form a plurality of substantially pure CNTs.