H01L2924/191

Substrate-less stackable package with wire-bond interconnect
10510659 · 2019-12-17 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

SUBSTRATE-LESS STACKABLE PACKAGE WITH WIRE-BOND INTERCONNECT
20190096803 · 2019-03-28 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Substrate-less stackable package with wire-bond interconnect
10170412 · 2019-01-01 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Substrate-Less Stackable Package With Wire-Bond Interconnect
20180233448 · 2018-08-16 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Substrate-less stackable package with wire-bond interconnect
09953914 · 2018-04-24 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

SECURITY CHIP FOR ENSURING THE PHYSICAL INTEGRITY OF AN INTEGRATED CIRCUIT
20250079344 · 2025-03-06 · ·

A secure electronic component assembly is described herein for ensuring the physical integrity of an integrated circuit (IC). The secure electronic component assembly may comprise a printed circuit board (PCB), an integrated circuit (IC) mounted on the PCB, and a security chip that is operatively coupled to the IC. The IC may comprise a plurality of solder balls operatively coupled thereto and configured for physical and electrical connection between the IC and the PCB. The security chip is configured to detect a potential tampering of the IC.

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

An electronic package and a manufacturing method thereof are provided, wherein a circuit structure is formed on a carrier structure having a groove and through holes, a plurality of conductive pillars are disposed in a plurality of through holes to be electrically connected to the circuit structure, and electronic elements are placed in the groove to be electrically connected to the circuit structure, then a wiring structure is disposed on the carrier structure to be electrically connected to the plurality of conductive pillars, and wherein the carrier structure is a plate made of semiconductor material, thereby the manufacturing process can be simplified and the warpage problems can be reduced.