H01L31/1808

Contacting area on germanium

A method of forming an opening in an insulating layer covering a semiconductor region including germanium, successively including: the forming of a first masking layer on the insulating layer; the forming on the first masking layer of a second masking layer including an opening; the etching of an opening in the first masking layer, in line with the opening of the second masking layer; the removal of the second masking layer by oxygen-based etching; and the forming of the opening of said insulating layer in line with the opening of the first masking layer, by fluorine-based etching.

Avalanche photodiode device with a curved absorption region

An avalanche photodiode (APD) device, in particular, a lateral separate absorption charge multiplication (SACM) APD device, and a method for its fabrication is provided. The APD device comprises a first contact region and a second contact region formed in a semiconductor layer. Further, the APD device comprises an absorption region formed on the semiconductor layer, wherein the absorption region is at least partly formed on a first region of the semiconductor layer, wherein the first region is arranged between the first contact region and the second contact region. The APD device further includes a charge region formed in the semiconductor layer between the first region and the second contact region, and an amplification region formed in the semiconductor layer between the charge region and the second contact region. At least the absorption region is curved on the semiconductor layer.

Optical Module and Method for Manufacturing the Same
20220328704 · 2022-10-13 ·

A silicon nitride core is formed on a silicon core via a first silicon oxide layer, and a germanium pattern caused to selectively grow in an opening penetrating through a second silicon oxide layer formed on the silicon nitride core and the first silicon oxide layer is formed on a lower silicon pattern formed to be continuous with the silicon core, thereby constituting a Ge photodiode.

Photodiode with integrated, self-aligned light focusing element

The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.

Five junction multijunction metamorphic solar cell
11652182 · 2023-05-16 · ·

A five junction solar cell and its method of manufacture including an upper first solar subcell composed of a semiconductor material having a first band gap; a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell; a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell; a fourth solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a fourth band gap smaller than the third band gap and being lattice matched with respect to the third solar subcell; a graded interlayer adjacent to the fourth solar subcell and having a fifth band gap greater than the fourth band gap; and a bottom solar subcell adjacent to the graded interlayer and being lattice mismatched from the fourth solar subcell and having a sixth band gap smaller than the fifth band gap.

SEMICONDUCTOR DEVICE INCLUDING GERMANIUM REGION DISPOSED IN SEMICONDUCTOR SUBSTRATE

In some embodiments, the present disclosure relates to a single-photon avalanche detector (SPAD) device including a silicon substrate including a recess in an upper surface of the silicon substrate. A p-type region is arranged in the silicon substrate below a lower surface of the recess. An n-type avalanche region is arranged in the silicon substrate below the p-type region and meets the p-type region at a p-n junction. A germanium region is disposed within the recess over the p-n junction.

MULTIJUNCTION METAMORPHIC SOLAR CELLS
20230207717 · 2023-06-29 ·

A multijunction solar cell in accordance with an example implementation includes a growth substrate; a first solar subcell disposed over or in the growth substrate; a tunnel diode disposed over the first solar subcell; and a grading interlayer directly disposed over the tunnel diode; a sequence of layers of semiconductor material forming a solar cell disposed over the grading interlayer comprising a plurality of solar subcells. The multijunction solar cell also includes a first wafer bowing inhibition layer disposed directly over an uppermost sublayer of the grading interlayer, such bowing inhibition layer having an in-plane lattice constant greater than the in-plane lattice constant of the uppermost sublayer of the grading interlayer. A second wafer bowing inhibition layer is disposed directly over the first wafer bowing inhibition layer.

Photodetectors

The subject matter of this specification can be embodied in, among other things, a photodetector that includes a semiconductor substrate, a semiconductor annulus on a planar face of the semiconductor substrate, and a metal layer on the semiconductor substrate, wherein the metal layer comprises a first region surrounding the semiconductor annulus and comprises a second region filling an interior region to the semiconductor annulus, and the metal layer in the first region forms a Schottky junction with the semiconductor ring.

PLANAR GERMANIUM PHOTODETECTOR
20230197867 · 2023-06-22 ·

Embodiments described herein may be related to apparatuses, processes, and techniques directed to a planar germanium photodetector that includes n-type and p-type amorphous silicon deposits on a germanium slab. During operation, a uniform electrical field is formed across the germanium bulk between the amorphous silicon deposits. Other embodiments may be described and/or claimed.

P+ OR N+ TYPE DOPING PROCESS FOR SEMICONDUCTORS

A p+ or n+ type doping process for semiconductors, allows to implement a semiconductor with a highly doped surface layer, and it comprises the steps of: providing a substrate made of semiconductor material; depositing on a surface of 5 the substrate made of semiconductor material a thin source layer made of dopant material acting as dopant source; depositing on said source layer an additional protective surface layer made of semiconductor material; inducing liquefaction of the surface layer at least until the source layer; and cooling down the substrate surface so as to obtain the diffusion of the dopant material.