A light emitting diode device comprising: a plurality of nanowires or nanopyramids grown on a graphitic substrate, said nanowires or nanopyramids having a p-n or p-i-n junction, a first electrode in electrical contact with said graphitic substrate; a light reflective layer in contact with the top of at least a portion of said nanowires or nanopyramids, said light reflective layer optionally acting as a second electrode; optionally a second electrode in electrical contact with the top of at least a portion of said nanowires or nanopyramids, said second electrode being essential where said light reflective layer does not act as an electrode; wherein said nanowires or nanopyramids comprise at least one group III-V compound semiconductor; and wherein in use light is emitted from said device in a direction substantially opposite to said light reflective layer.

The present invention relates to the epitaxial lift-off of thin-films allowing the reuse of the expensive semiconductor substrates. In particular, it describes a structure and a method for epitaxial lift-off of several thin films from a single substrate (100) using a plurality of dissimilar sacrificial layers (101), strained layers (102, 104), and/or device or component layers (103). The properties of the sacrificial layers (101) and the strained layers (102,104) can be used (i) to facilitate the lift off process, (ii) to control the point of time of release of each released thin film individually and (iii) to aid in separation and sorting of the released thin films. The released device or component layers can comprise various useful structures, such as optoelectronic devices photonic components.

An ICIP comprises: a number N.sub.s of IC stages, wherein N.sub.s is configured to achieve a fundamental limit of the detectivity D.sub.peak* the ICIP within a range, and wherein each of the IC stages comprises: a hole barrier; an absorber coupled to the hole barrier and comprising a thickness d, wherein d is configured to achieve D.sub.peak* within the range; and an electron barrier coupled to the absorber. A method of manufacturing an ICIP comprises: determining a number N.sub.s of IC stages of the ICIP, wherein N.sub.s is configured to achieve a peak detectivity D.sub.peak* of the ICIP within a range; determining a thickness d of an absorber, wherein d is configured to achieve D.sub.peak* within the range; obtaining a substrate; forming an electron barrier on the substrate, the absorber having d on the electron barrier, and a hole barrier on the absorber; and repeating the forming N.sub.s times.

A method of preparing a device coupon for a micro-transfer printing process from a multi-layered stack located on a device wafer substrate. The multi-layered stack comprises a plurality of semiconductor layers. The method comprises steps of: (a) etching the multi-layered stack to form a multi-layered device coupon, including an optical component; and (b) etching a semiconductor layer of the multi-layered device coupon to form one or more tethers, said tethers securing the multi-layered device coupon to one or more supports.

A semiconductor body main include a III-V compound semiconductor material having a p-conductive region doped with a p-dopant. The p-conductive region may include at least one first section, one second section, and one third section. The second section may be arranged between the first and third sections. The second section may directly adjoin the first and third sections. An indium concentration of at least one of the sections differs from an indium concentration of the other two sections.

A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group device can be optically and/or electrically connected to group IV devices in the group IV substrate.

A multijunction solar cell including a substrate and a top (or light-facing) solar subcell having an emitter layer, a base layer, and a window layer adjacent to the emitter layer, the window layer composed of a material that is optically transparent, has a band gap of greater than 2.6 eV, and includes an appropriately arranged multilayer antireflection coating on the top surface thereof.

A multijunction solar cell including an upper first solar subcell having a first band gap and positioned for receiving an incoming light beam; and a second solar subcell disposed below and adjacent to and lattice matched with said upper first solar subcell, and having a second band gap smaller than said first band gap; wherein at least one of the solar subcells has a graded band gap throughout the thickness of at least a portion of its emitter layer and base layer.

A semiconductor device includes a dielectric layer, a first trench located in the dielectric layer, a first semiconductor located in the first trench, a second semiconductor layer and an electrical connector. The dielectric layer has a first surface. The second semiconductor layer includes an active portion connecting the first semiconductor layer, and the electrical connector is located on the first surface and connects the second semiconductor layer.

A method is provided for fabricating an avalanche photodiode (APD) device, in particular, a separate absorption charge multiplication (SACM) APD device. The method includes forming a first contact region and a second contact region in a semiconductor layer. Further, the method includes forming a first mask layer above at least a first contact region of the semiconductor layer adjacent to the first contact region, and forming a second mask layer above and laterally overlapping the first mask layer. Thereby, a mask window is defined by the first mask layer and the second mask layer, and the first mask layer and/or the second mask layer are formed above a second contact region of the semiconductor layer adjacent to the second contact region. Further, the method includes forming a charge region in the semiconductor layer through the mask window, wherein the charge region is formed between the first contact region and the second contact region, and comprises forming an absorption region on the first contact region using the first mask layer. An APD fabricated by the disclosed method is also provided.