In some examples, a device includes a magnetic tunnel junction including a first Weyl semimetal layer, a second Weyl semimetal layer, and a dielectric layer positioned between the first and second Weyl semimetal layers. The magnetic tunnel junction may have a large tunnel magnetoresistance ratio, which may be greater than five hundred percent or even greater than one thousand percent.

The present invention relates to a sensor device which has high S/N and excellent temperature characteristics. A sensor device has a semiconductor substrate, a first metal wiring layer provided on the semiconductor substrate, a first insulating layer provided on the first metal wiring layer, a compound semiconductor sensor element provided on the first insulating layer, a second metal wiring layer provided on the compound semiconductor sensor element and the first insulating layer, and a second insulating layer provided on the second metal wiring layer. A third insulating layer is provided between the first metal wiring layer and the second metal wiring layer, and the compound semiconductor sensor element is provided in the third insulating layer.

A high-temperature three-dimensional Hall sensor with a real-time working temperature monitoring function includes a buffer layer, an epitaxial layer, and a barrier layer sequentially grown on a substrate. A high-density two-dimensional electron gas is induced by polarization charges in a potential well at an interface of heterojunctions of the epitaxial layer. A lower surface of the substrate includes a vertical Hall sensor for sensing a magnetic field parallel to a surface of a device. An upper surface of the barrier layer includes a “cross” horizontal Hall sensor for sensing a magnetic field perpendicular to the surface of the device.

This spin element includes: a current-carrying part that extends in a first direction; and an element part that is laminated on one surface of the current-carrying part, wherein the current-carrying part includes a first wiring and a second wiring in order from a side of the element part, and wherein both of the first wiring and the second wiring are metals and temperature dependence of resistivity of the first wiring is larger than temperature dependence of resistivity of the second wiring in at least a temperature range of −40° C. to 100° C.

An SOI semiconductor structure, including a substrate layer formed on a back side and a semiconductor layer of a second conductivity type formed on a front side, an insulating layer being disposed between the substrate layer and the semiconductor layer, a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body being formed in the semiconductor layer, and the semiconductor body extending from an underside up to the front side, at least three first metallic terminal contacts being formed on the upper side, and at least three second metallic terminal contacts being formed on the underside, the first terminal contacts being offset with respect to the second terminal contacts in a projection perpendicular to the front side, each first terminal contact and each second terminal contact being formed in each case on a highly doped semiconductor contact region of a second conductivity type.

A semiconductor device includes a vertical Hall element provided in a first region of a semiconductor substrate, and having the first to the third electrodes arranged side by side in order along a first straight line; a circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and a second straight line intersecting orthogonally a current path for a Hall element drive current which flows between the first electrode and the third electrode. The second line passes a center of the vertical Hall element, and a center point of a region which reaches the highest temperature in the circuit during an operation of the vertical Hall element lies on the second straight line.

A method for configuring a reconfigurable physical unclonable function (PUF) based on a device with spin-orbit torque (SOT) effect is provided. The disclosure uses SOT or magnetic field to change the magnetic moment. After the current or magnetic field is removed, the magnetic moment returns to the easy axis direction. Under the effect of thermal fluctuation, the magnetic moment is randomly oriented in the easy axis direction. The non-volatile devices are formed into an array, the magnetic moments of all non-volatile devices are randomly distributed after a write operation. The read state can be used as a random code to implement the reconfigurable PUF. The PUF has a simple structure and guarantees security. The random code in the disclosure may be two-state or multi-state, which is related to the number of magnetic domains of the ferromagnetic layer. A large number of challenge response pairs form a strong PUF.

A semiconductor device which comprises a substrate and a plurality of layers of semiconductor material. A primary region is provided which has a primary contact associated therewith. The device includes a secondary region which has first and second secondary contacts associated therewith. A conductive region is provided between the primary and secondary regions. An auxiliary contact is operably coupled to a current source and controls the flow of current through the semiconductor device dependent on temperature.

A spin element according to the present embodiment includes a wiring, a laminate including a first ferromagnetic layer laminated on the wiring, a first conductive part and a second conductive part with the first ferromagnetic layer therebetween in a plan view in a lamination direction, and an intermediate layer which is in contact with the wiring and is between the first conductive part and the wiring, wherein a diffusion coefficient of a second element including the intermediate layer with respect to a first element including the wiring is smaller than a diffusion coefficient of a third element constituting the first conductive part with respect to the first element or a diffusion coefficient of the third element including the first conductive part with respect to the second element constituting the wiring is smaller than a diffusion coefficient of the third element with respect to the first element constituting the intermediate layer.

The present disclosure generally relate to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a topological insulator (TI) modulation layer. The TI modulation layer comprises a plurality of bismuth or bismuth-rich composition modulation layers, a plurality of TI lamellae layers comprising BiSb having a (012) crystal orientation, and a plurality of texturing layers. The TI lamellae layers comprise dopants or clusters of atoms, the clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material. The clusters of atoms are configured to have a grain boundary glass forming temperature of less than about 400° C. Doping the TI lamellae layers comprising BiSb having a (012) crystal orientation with clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material enable the SOT MTJ device to operate at higher temperatures while inhibiting migration of Sb from the BiSb of the TI lamellae layers.