Patent classifications
H01L51/10
ELECTRONIC COMPONENT
An electronic component (10) comprising a plurality of switching elements (1) which comprise, in this sequence, a first electrode (16), a molecular layer (18) bonded to a substrate, and a second electrode (20), where the molecular layer essentially consists of molecules (M) which contain a connecting group (V) and an end group (E) having a polar or ionic function, is suitable as memristive device for digital information storage.
HETEROGENEOUS NANOSTRUCTURES FOR HIERARCHAL ASSEMBLY
A method of making a carbon nanotube structure includes depositing a first oxide layer on a substrate and a second oxide layer on the first oxide layer; etching a trench through the second oxide layer; removing end portions of the first oxide layer and portions of the substrate beneath the end portions to form cavities in the substrate; depositing a metal in the cavities to form first body metal pads; disposing a carbon nanotube on the first body metal pads and the first oxide layer such that ends of the carbon nanotube contact each of the first body metal layers; depositing a metal to form second body metal pads on the first body metal pads at the ends of the carbon nanotube; and etching to release the carbon nanotube, first body metal pads, and second body metal pads from the substrate, first oxide layer, and second oxide layer.
Neuron behavior-imitating electronic synapse device and method of fabricating the same
The present disclosure relates to a neuron behavior-imitating electronic synapse device and a method of fabricating the same. According to one embodiment, the neuron behavior-imitating synapse device includes a first electrode having a lithium-doped surface, an active layer formed on the first electrode and including a polyelectrolyte and one or more metal nanoparticles, and a second electrode formed on the active layer.
CARBON NANOTUBE (CNT) MEMORY CELL ELEMENT AND METHODS OF CONSTRUCTION
Carbon nanotube (CNT) memory cell elements and methods of forming CNT memory cell elements are provided. A CNT memory cell may comprise a CNT memory cell element, e.g., in combination with a transistor. A CNT memory cell element may include a metal/CNT layer/metal (M/CNT/M) structure formed between adjacent metal interconnect layers or between a silicided active layer (e.g., including MOSFET devices) and a metal interconnect layer. The M/CNT/M structure may be formed by a process including forming a tub opening in a dielectric region, forming a cup-shaped bottom electrode in the tub opening, forming a cup-shaped CNT layer in an interior opening defined by the cup-shaped bottom electrode, and forming a top electrode in an interior opening defined by the cup-shaped CNT layer.
Display device including capping pattern and method of manufacturing the same
A display device including a substrate having a display area and a peripheral area defined outside the display area, a circuit layer disposed on the substrate, a device layer disposed on the display area, an encapsulation layer covering the device layer, a touch sensing unit including at least one touch insulating layer disposed on the encapsulation layer, touch electrodes disposed on the encapsulation layer, and touch signal lines connected to the touch electrodes, a first section disposed in the peripheral area and including a first part having a first thickness, a second part having a second thickness less than the first thickness and overlapping the touch signal lines, and an intermediate part connecting the first part and the second part and being inclined, and a first thickening pattern overlapping at least the intermediate part.
Package including fully integrated voltage regulator circuitry within a substrate
Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.
Method for manufacturing transistor comprising removal of oxide film
A method for manufacturing a transistor being a bottom-gate transistor is provided. The method for manufacturing a transistor includes a step of forming a first metal layer 32 on an insulator layer 20 provided on a substrate 10 including a gate electrode, a step of applying a resist onto the first metal layer 32, and patterning the first metal layer 32 by a photolithographic method, an oxide film removal step of removing an oxide film 26 formed on the patterned first metal layer 32, and a step of forming a source electrode and a drain electrode by forming a second metal layer 42 on the first metal layer 32.
ORGANIC ELECTROCHEMICAL TRANSISTOR FOR BIOLOGICAL ELEMENT
An organic electrochemical transistor including a source and drain connected by a conductive channel, a gate electrically connected to the conductive channel via an ionically stable layer, and a biological recognition layer in direct contact with the gate. The organic electrochemical transistor can be used to measure the concentration of a biological element in a biological sample. Also, an electronic device including the organic electrochemical transistor.
Semiconductor devices
A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.
Urea (multi)-(meth)acrylate (multi)-silane compositions and articles including the same
Urea (multi)-(meth)acrylate (multi)-silane precursor compounds, synthesized by reaction of (meth)acrylated materials having isocyanate functionality with aminosilane compounds, either neat or in a solvent, and optionally with a catalyst, such as a tin compound, to accelerate the reaction. Also described are articles including a substrate, a base (co)polymer layer on a major surface of the substrate, an oxide layer on the base (co)polymer layer; and a protective (co)polymer layer on the oxide layer, the protective (co)polymer layer including the reaction product of at least one urea (multi)-(meth)acrylate (multi)-silane precursor compound synthesized by reaction of (meth)acrylated materials having isocyanate functionality with aminosilane compounds. The substrate may be a (co)polymer film or an electronic device such as an organic light emitting device, electrophoretic light emitting device, liquid crystal display, thin film transistor, or combination thereof. Methods of making the urea (multi)-(meth)acrylate (multi)-silanes and their use in composite films and electronic devices are described.