An embodiment of the present disclosure relates to an electronic circuit including a first switch coupling a first node of the circuit to an input/output terminal of the circuit; a second switch coupling the first node to a second node of application of a fixed potential; and a high-pass filter having an input coupled to the terminal and an output coupled to a control terminal of the second switch.

An embodiment of the present disclosure relates to an electronic circuit including a first switch coupling a first node of the circuit to an input/output terminal of the circuit; a second switch coupling the first node to a second node of application of a fixed potential; and a high-pass filter having an input coupled to the terminal and an output coupled to a control terminal of the second switch.

A microcontroller unit for controlling a three-level inverter including delayed fault protection is provided. The microcontroller unit includes an input port configured to receive a trip signal from a fault detection module, and a plurality of EPWM modules, each configured to control a power switch within the three-level inverter. The microcontroller unit includes an auxiliary EPWM module configured to receive the trip signal and produce a delayed trip signal, and processing circuitry coupled with the input port, the plurality of EPWM modules, and the auxiliary EPWM module. The processing circuitry is configured to, in response to activation of the trip signal, direct one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the trip signal, and to direct a different one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the delayed trip signal.

A microcontroller unit for controlling a three-level inverter including delayed fault protection is provided. The microcontroller unit includes an input port configured to receive a trip signal from a fault detection module, and a plurality of EPWM modules, each configured to control a power switch within the three-level inverter. The microcontroller unit includes an auxiliary EPWM module configured to receive the trip signal and produce a delayed trip signal, and processing circuitry coupled with the input port, the plurality of EPWM modules, and the auxiliary EPWM module. The processing circuitry is configured to, in response to activation of the trip signal, direct one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the trip signal, and to direct a different one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the delayed trip signal.

A method and apparatus for tertiary control with over-current protection. In one embodiment, the method comprises calculating at least one unconstrained optimal net intertie target for an area of a power network; calculating, for each resource within the area, optimal scheduled current to achieve the at least one unconstrained optimal net intertie target; calculating, using the optimal scheduled currents and a plurality of stress coefficients, net scheduled current for each power line segment within the area; comparing the net scheduled currents to corresponding stress thresholds to identify any stress violations; reducing, when the comparing step identifies one or more stress violations, the optimal scheduled current for one or more resources contributing to the one or more stress violations; and calculating, when the comparing step identifies the one or more stress violations, updated optimal scheduled current for one or more resources not contributing to the one or more stress violations.

A power supply comprises voltage regulation circuitry, a load-share controller, and overcurrent protection circuitry. The voltage regulation circuitry is configured to output a regulated voltage. The load-share controller is configured to control the voltage regulation circuitry to adjust the regulated voltage responsive to a load-share voltage signal (LSV) that indicates an amount of load current being delivered to a load. The overcurrent protection circuitry is configured to selectively couple the regulated voltage to the load. When the load current exceeds a threshold current, the overcurrent protection circuitry is configured to decouple the regulated voltage from the load. While the regulated voltage is decoupled from the load, and when the LSV signal indicates that load current is being delivered to the load by a different power supply, the overcurrent protection circuitry is configured to recouple the regulated voltage to the load.

An embodiment of the present disclosure relates to an electronic circuit including a first switch coupling a first node of the circuit to an input/output terminal of the circuit; a second switch coupling the first node to a second node of application of a fixed potential; and a highpass filter having an input coupled to the terminal and an output coupled to a control terminal of the second switch.

An embodiment of the present disclosure relates to an electronic circuit including a first switch coupling a first node of the circuit to an input/output terminal of the circuit; a second switch coupling the first node to a second node of application of a fixed potential; and a highpass filter having an input coupled to the terminal and an output coupled to a control terminal of the second switch.

A circuit breaker device or circuit breaker system may include a series connection of a semiconductor switch and an isolating contact system, for a low voltage electrical circuit, in which the magnitude of the current is determined.

The present disclosure relates to systems and methods to coordinate protective elements in an electric power system (EPS). In one embodiment, a system may include a Time vs Normalized Impedance Length subsystem to determine a first plurality of times of operation of a first protective element for a plurality of fault locations in the EPS and to determine a second plurality of times of operation of a second protective element for the plurality of fault locations in the EPS. A protective action subsystem may coordinate a response of the first protective element and the second protective element. The protective action subsystem may establish a pickup and a protective action for the second protective element. Upon detection of a fault in the EPS, one of the first protective action and the second protective action may be implemented based on one of the first pickup and the second pickup.