A switching mode power supply preventing a first switch from being falsely triggered. The switching mode power supply detects a peak of an input signal and starts timing a period of time since the arrival of the peak of the input signal is detected. The first switch starts performing the on and off switching operations when the period of time expires.

Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.

Various embodiments of the present application are directed towards an integrated circuit (IC) including a first switching device, a second switching device, an inductor, and a controller. The inductor is electrically coupled to a first source/drain region of the first switching device and a first source/drain region of the second switching device at a node. The controller is configured to alternatingly change the first and second switching devices between a first state and a second state, respectively. The first switching device is in a third state before or after the second switching device transitions between the first and second states. A subthreshold voltage is applied to a first gate of the first switching device during the third state, such that the third state is between a cutoff mode and a triode mode of the first switching device.

Operating DC to DC power converters. At least some of the example embodiments are methods including: driving current through an inductance in a first on cycle of the power converter; comparing, by a comparator, a signal indicative of current through the inductance coupled to a first input of the comparator to a threshold applied to a second input of the comparator, and asserting a comparator output responsive to the signal indicative of current meeting the threshold; sampling a differential voltage across the first and second inputs, the sampling responsive to assertion of a comparator output, and the differential voltage indicative of propagation delay through the comparator; and compensating the comparator in a second on cycle for the compensation delay based on the differential voltage, the second on cycle subsequent to the first on cycle.

A power conversion device includes three inverters configured to convert DC power of DC buses into single-phase AC power, and a controller configured to control the three inverters so as to generate three-phase AC power. The controller is configured to generate a fundamental wave command for generating one-phase AC power constituting the three-phase AC power, and to generate an adjustment wave command having triple the frequency of the fundamental wave command. Additionally, the controller is configured to output a phase voltage command, in which the adjustment wave command is superimposed on the fundamental wave command, and to determine an initial phase of the adjustment wave command to be offset from an initial phase of the fundamental wave command so as to reduce a voltage ripple occurring in the DC buses at double the frequency of the fundamental wave command.

Technologies for alternating current regulation controller include a controller configured to determine a voltage duty cycle based on a target voltage, and to determine a delay time based on the voltage duty cycle. The controller is coupled to input phases of an alternating current generator having multiple phases. Each phase is coupled to a silicon controlled rectifier. For each phase, the controller identifies a rising edge asserted on the input phase, waits the delay time after identifying the rising edge, and asserts an output pulse on an output driver coupled to the silicon controlled rectifier coupled to the input phase in response to waiting the delay time. Other embodiments are described and claimed.

A DC-DC converter includes a high-side switch coupled between a first power supply and an output terminal, a low-side switch coupled between a second power supply and the output terminal, an inductor coupled to the output terminal, and a reverse current monitoring circuit that determines that a reverse current from the inductor to the output terminal occurs when the output terminal becomes a high voltage during a state in which the high-side switch and the low-side switch are in a dead time.

A drive circuit includes a second drive circuit that drives a semiconductor switching element in a case where a pulse width of a corresponding signal is determined to be larger than a second threshold, and a timing adjustment circuit that adjusts a timing at which the second drive circuit cooperates with a first drive circuit to drive the semiconductor switching element during a turn-off period of the semiconductor switching element due to drive of the first drive circuit.

A converter includes a DC bus, a first DC-DC converter, a second DC-DC converter, and a plurality of circulating current suppression circuits. The first DC-DC converter is coupled to the DC bus and includes a first plurality of switches. The second DC-DC converter is coupled to the DC bus in parallel with the first DC-DC converter. The second DC-DC converter includes a second plurality of switches. The plurality of circulating current suppression circuits are coupled to the DC bus and are further respectively coupled to the first DC-DC converter and the second DC-DC converter. Each of the plurality of circulating current suppression circuits has a resonant frequency at or around a switching frequency for the first and second pluralities of switches. The plurality of circulating current suppression circuits is configured to suppress current at or around the switching frequency and pass at least direct current.

Provided is a highly reliable electronic control unit capable of improving responsiveness of an output current of a switching power supply to load current variation and suppressing power supply voltage variation accompanying the load current variation at low cost and with high power efficiency. Provided are: a calculation unit that performs signal processing; a first power supply circuit that supplies a first power supply voltage to the calculation unit; and a second power supply circuit that supplies a second power supply voltage to the first power supply circuit. The calculation unit has a function of outputting a control signal when a change in a consumed current of the calculation unit exceeds a predetermined threshold, and changes any one or both of a control scheme of the first power supply circuit and the second power supply voltage according to the control signal.