A method for operating a system for electrolysis in order to obtain at least one gaseous electrolysis product, in which system at least one electrolysis device is electrically connected to a power converter by means of a direct-voltage circuit, the power converter being connected to an alternating-voltage circuit in order to supply the at least one electrolysis device with electrically energy for the operation of the at least one electrolysis device, the power converter being operated by means of zero crossing control. The invention further relates to a system of this type.

A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

An apparatus for controlling one or more switched high power loads (or heating elements). The apparatus including: one or more switched high power loads (or heating elements), each high power load being powered from a common alternating current power source, and wherein each load is independently switched using a switching signal for zero crossing switching to achieve a desired average power output; the switching signal is generated that comprises a repeated switching sequence; the switching sequence indicates a respective selecting activation for each of the switched high power load over a sequence of half or full cycles.

A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

A method for high speed switching comprises receiving voltage inputs at a bridge rectifier, receiving a logic input signal at an optical isolator and generating an output signal from the optical isolator based on the logic input signal, and driving a gate of a field effect transistor (FET) via the output signal of the optical isolator, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The method further includes limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

A method for high speed switching comprises receiving voltage inputs at a bridge rectifier, receiving a logic input signal at an optical isolator and generating an output signal from the optical isolator based on the logic input signal, and driving a gate of a field effect transistor (FET) via the output signal of the optical isolator, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The method further includes limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.

A method of operating a flyback converter is provided. The flyback converter comprises a transformer having a primary side winding and a secondary side winding, a primary switch at the primary side of the transformer and a secondary switch at the secondary side of the transformer, and a control unit. At the end of a switching cycle, before turning on the primary side switch: the control unit generates a Zero Voltage Switching (ZVS) pulse in the secondary side winding, such that the parasitic capacitor of the primary side switch is discharged. Consequently, the primary side switch is turned on in ZVS or near ZVS conditions.

A switching circuit includes a bridge rectifier to receive voltage inputs and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.