Circuits, apparatuses, and methods are disclosed for frequency division. In one such example circuit, a frequency divider is configured to alternate between providing a common frequency clock signal as an output clock signal through a first circuit responsive to a reference clock signal and providing a reduced frequency clock signal as the output clock signal through a second circuit responsive to the reference clock signal. The first and second circuits share a shared circuit through which the output clock signal is provided. An enable circuit is configured to cause the frequency divider to alternate between providing the common frequency clock signal as the output clock signal through the first circuit and the reduced frequency clock signal as the output clock signal through the second circuit.

An apparatus for performing a frequency multiplication of an mm-wave wave signal is provided. The apparatus includes a first differential circuit that is capable of receiving a 0 phase component of an input signal and a 180 phase component of the input signal having a first frequency. The first differential circuit provides a first output signal that is twice the frequency and is in phase(0) based on the 0 the 180 phase components of the input signal. The apparatus also includes a second differential circuit that is capable of receiving a 90 phase component of the input signal and a 270 phase component of the input signal, and provide a first output signal that is twice the frequency and out of phase(180). The apparatus also includes a differential transformer that is configured to receive the first output signal and the second output signal. The differential transformer is configured to provide a differential output signal that has a second frequency that is twice the first frequency.

An apparatus for performing a frequency multiplication of an mm-wave wave signal is provided. The apparatus includes a first differential circuit that is capable of receiving a 0 phase component of an input signal and a 180 phase component of the input signal having a first frequency. The first differential circuit provides a first output signal that is twice the frequency and is in phase(0) based on the 0 the 180 phase components of the input signal. The apparatus also includes a second differential circuit that is capable of receiving a 90 phase component of the input signal and a 270 phase component of the input signal, and provide a first output signal that is twice the frequency and out of phase(180). The apparatus also includes a differential transformer that is configured to receive the first output signal and the second output signal. The differential transformer is configured to provide a differential output signal that has a second frequency that is twice the first frequency.

A controllable splitting method comprises: electrically connecting a photoconductive switch between input and output ends of a current pulse; connecting a time domain signal of the input current pulse to an external triggering port of a pulse laser; emitting a laser pulse to irradiate the switch; when no current pulse is input, failing to receive an external triggering signal and not outputting the laser pulse, the switch being in an off state without the irradiation of the laser pulse, and no current being output; when the current pulse is input, triggering the pulse laser to synchronously output the laser pulse on a time domain, irradiating the switch so that the switch is in an on state and the current pulse is output; and forming, at the output end, a current pulse signal synchronous with a time domain of the input end and having a split waveform.

An apparatus for performing a frequency multiplication of an mm-wave wave signal is provided. The apparatus includes a first differential circuit that is capable of receiving a 0 phase component of an input signal and a 180 phase component of the input signal having a first frequency. The first differential circuit provides a first output signal that is twice the frequency and is in phase(0) based on the 0 the 180 phase components of the input signal. The apparatus also includes a second differential circuit that is capable of receiving a 90 phase component of the input signal and a 270 phase component of the input signal, and provide a first output signal that is twice the frequency and out of phase(180). The apparatus also includes a differential transformer that is configured to receive the first output signal and the second output signal. The differential transformer is configured to provide a differential output signal that has a second frequency that is twice the first frequency.

Circuits, apparatuses, and methods are disclosed for frequency division. In one such example circuit, a frequency divider is configured to alternate between providing a common frequency clock signal as an output clock signal through a first circuit responsive to a reference clock signal and providing a reduced frequency clock signal as the output clock signal through a second circuit responsive to the reference clock signal. The first and second circuits share a shared circuit through which the output clock signal is provided. An enable circuit is configured to cause the frequency divider to alternate between providing the common frequency clock signal as the output clock signal through the first circuit and the reduced frequency clock signal as the output clock signal through the second circuit.

A solid-state device chip including diodes (generating a higher or lower frequency output through frequency multiplication or mixing of the input frequency) and a novel on-chip diplexing design that allows combination of two or more multiplier or mixer structures operating at different frequency bands within the 50-5000 GHz range within a same chip and/or waveguide. The on-chip diplexing design consists of a single-substrate multiplier chip with two or more multiplying structures each one containing 2 or more Schottky diodes. The diodes in each structure are tuned to one portion of the target frequency band, resulting in the two or more structures working together as a whole as a large broadband multiplier or mixer. Thus, an increase in bandwidth from 10-15% (current state-of-the-art) to at least 40% is achieved. Depending on the target frequencies, each subset of diodes within the chip can be designed to work either as a doubler or a tripler.

A solid-state device chip including diodes (generating a higher or lower frequency output through frequency multiplication or mixing of the input frequency) and a novel on-chip diplexing design that allows combination of two or more multiplier or mixer structures operating at different frequency bands within the 50-5000 GHz range within a same chip and/or waveguide. The on-chip diplexing design consists of a single-substrate multiplier chip with two or more multiplying structures each one containing 2 or more Schottky diodes. The diodes in each structure are tuned to one portion of the target frequency band, resulting in the two or more structures working together as a whole as a large broadband multiplier or mixer. Thus, an increase in bandwidth from 10-15% (current state-of-the-art) to at least 40% is achieved. Depending on the target frequencies, each subset of diodes within the chip can be designed to work either as a doubler or a tripler.

The disclosure discloses a multiplexer based frequency extender comprising a preamplifier to receive a RF input signal and output a pre-amplified RF signal, at least one frequency multiplier or at least one frequency divider, and a multiplexer. The multiplexer comprises multiple differential pairs, each differential pair comprises a corresponding bias current control circuit that switches ON or OFF a bias current flowing through a corresponding differential pair. The at least one frequency multiplier or the at least one frequency divider receives the pre-amplified RF signal and outputs a frequency-multiplied RF signal or a frequency-divided signal. The multiplexer couples to receive the pre-amplified RF signal, the frequency-multiplied RF signal and/or the frequency-divided signal, the multiplexer selects a signal from the received signals and outputs based on the selected signal a multiplexer output signal.