A variable capacitance circuit includes a capacitor array having a first capacitor in which a plurality of MIM capacitors are coupled in parallel and a second capacitor in which a plurality of MIM capacitors are coupled in series, and a switch array having a first switch and a second switch. A shape pattern of at least one of a first electrode of the first capacitor, a first ground shield, a second electrode of the second capacitor, and a second ground shield is set so that a first capacitance difference per 1 LSB between first capacitance values of the first capacitor when the first switch is turned on and off and a second capacitance difference per 1 LSB between second capacitance values of the second capacitor when the second switch is turned on and off are close to each other.

A circuit device includes an oscillation circuit and a processing circuit that generates capacitance control data. The oscillation circuit includes a variable capacitance circuit whose capacitance value is variably controlled based on the capacitance control data, and an oscillation frequency thereof is controlled based on the capacitance value of the variable capacitance circuit. The variable capacitance circuit includes a capacitor array. The capacitor array includes a plurality of capacitors each having a binary-weighted capacitance value, and a plurality of switches that are on-off controlled based on the capacitance control data. The processing circuit outputs the capacitance control data, which is subjected to dithering, so as to switch the capacitance value of the variable capacitance circuit between a first capacitance value and a second capacitance value in a time division manner.

A continuous time linear equalizer comprises an input of a first equalizer path configured to receive a first differential input signal; an input of a second equalizer path configured to receive a second differential input signal; a first programmable load capacitor coupled to an output of the first equalizer path; a second programmable load capacitor coupled to an output of the second equalizer path; and a programmable source capacitor coupled between the first equalizer path and the second equalizer path.

A crystal oscillator and a startup method for initiating operation of a crystal oscillator with a crystal resonator including a first terminal and a second terminal, an electronic oscillator circuit connected to the crystal resonator, a first capacitor including first and second terminals, the second connected to the first terminal of the crystal resonator, a second capacitor including first and second terminals, the second connected to the second terminal of the crystal resonator. A switch includes first, second and third terminals, wherein an electrical conductivity between the first terminal and the second terminal of the switch is controllable by a voltage at the third terminal, wherein the first terminal of the switch is connected to the first terminal of the first capacitor and wherein the second terminal of the switch is connected to the first terminal of the second capacitor.

An oscillator includes a resonator, sustaining circuit and detector circuit. The sustaining circuit receives a sense signal indicative of mechanically resonant motion of the resonator generates an amplified output signal in response. The detector circuit asserts, at a predetermined phase of the amplified output signal, one or more control signals that enable an offset-reducing operation with respect to the sustaining amplifier circuit.

An oscillator includes a resonator, sustaining circuit and detector circuit. The sustaining circuit receives a sense signal indicative of mechanically resonant motion of the resonator generates an amplified output signal in response. The detector circuit asserts, at a predetermined phase of the amplified output signal, one or more control signals that enable an offset-reducing operation with respect to the sustaining amplifier circuit.

A circuit device includes an oscillation circuit that generates an oscillation signal by using a vibrator, a frequency adjustment circuit that adjusts an oscillation frequency of the oscillation circuit based on frequency adjustment data, a temperature sensor circuit that outputs temperature data, an arithmetic operation circuit, and a storage circuit. The arithmetic operation circuit outputs converted temperature data by performing, on the temperature data, conversion processing in which a slope of the converted temperature data with respect to the temperature data in a first temperature range is different from a slope of the converted temperature data with respect to the temperature data in a second temperature range. The storage circuit stores a lookup table representing a correspondence between the converted temperature data and the frequency adjustment data.

Disclosed are a crystal oscillator, a chip, and an electronic device. The crystal oscillator includes: an oscillating circuit, including: a crystal, an amplification circuit, a first load capacitor, and a second load capacitor, where the first load capacitor and the second load capacitor are respectively connected to a first terminal and a second terminal of the crystal; and a first Miller multiplication circuit, where an input terminal and an output terminal of the first Miller multiplication circuit are respectively connected to two terminals of the first load capacitor, and the first Miller multiplication circuit is configured to increase a first load capacitance of the oscillating circuit, where the first load capacitance is a capacitance between the first terminal of the crystal and the ground. According to this technical solution, an area occupied by the load capacitor as well as circuit costs can be reduced.

A circuit device includes an oscillation circuit and a processing circuit that generates capacitance control data. The oscillation circuit includes a variable capacitance circuit whose capacitance value is variably controlled based on the capacitance control data, and an oscillation frequency thereof is controlled based on the capacitance value of the variable capacitance circuit. The variable capacitance circuit includes a capacitor array. The capacitor array includes a plurality of capacitors each having a binary-weighted capacitance value, and a plurality of switches that are on-off controlled based on the capacitance control data. The processing circuit outputs the capacitance control data, which is subjected to dithering, so as to switch the capacitance value of the variable capacitance circuit between a first capacitance value and a second capacitance value in a time division manner.

A variable capacitance circuit includes a capacitor array having a first capacitor in which a plurality of MIM capacitors are coupled in parallel and a second capacitor in which a plurality of MIM capacitors are coupled in series, and a switch array having a first switch and a second switch. A shape pattern of at least one of a first electrode of the first capacitor, a first ground shield, a second electrode of the second capacitor, and a second ground shield is set so that a first capacitance difference per 1 LSB between first capacitance values of the first capacitor when the first switch is turned on and off and a second capacitance difference per 1 LSB between second capacitance values of the second capacitor when the second switch is turned on and off are close to each other.