To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).

A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and a frequency deviation with respect to a frequency at a time point when power supply starts is within a range of ±8 ppb at a time point when 10 seconds elapse from when the power supply starts, within a range of ±10 ppb at a time point when 20 seconds elapse from when the power supply starts, and within a range of ±10 ppb at a time point when 30 seconds elapse from when the power supply starts.

A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and in a case of varying temperature in a temperature range of ±5° C. centered on a reference temperature in intervals of 6 minutes, and assuming observation period as τ, a wander performance fulfills a condition that an MTIE value is equal to or shorter than 6 ns in a range of 0 s<τ≦0.1 s, the MTIE value is equal to or shorter than 27 ns in a range of 0.1 s<τ≦1 s, the MTIE value is equal to or shorter than 250 ns in a range of 1 s<τ≦10 s, the MTIE value is equal to or shorter than 100 ns in a range of 10 s<τ≦1700 s, and the MTIE value is equal to or shorter than 6332 ns in a range of 100 s<τ≦1000 s.

An apparatus is provided which comprises: a frequency locked loop (FLL) comprising an oscillator including a plurality of delay stages, wherein an output of each delay stage is counted to determine a frequency of the FLL; and one or more circuitries coupled to the FLL to adjust a power supply to the FLL according to the determined frequency of the FLL.

To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).

To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).

The present invention relates to a frequency generator arrangement having an oscillator for generating an oscillator signal having an oscillator frequency and an oscillator output for outputting the oscillator signal, the frequency generator arrangement further comprising a frequency multiplier coupled and/or connected to an oscillator output for generating an output signal of the frequency generator arrangement having a multiplier frequency corresponding to a multiple of the oscillator frequency, wherein the frequency multiplier comprises a frequency multiplier core directly causative of the frequency multiplication, the frequency multiplier core having a power supply, and the frequency generator arrangement having a control input for controlling the power supply to the frequency multiplier core, whereby an output power of the output signal is adjustable by controlling the power supply to the frequency multiplier core.

An apparatus is provided which comprises: a frequency locked loop (FLL) comprising an oscillator including a plurality of delay stages, wherein an output of each delay stage is counted to determine a frequency of the FLL; and one or more circuitries coupled to the FLL to adjust a power supply to the FLL according to the determined frequency of the FLL.

An apparatus is provided which comprises: a frequency locked loop (FLL) comprising an oscillator including a plurality of delay stages, wherein an output of each delay stage is counted to determine a frequency of the FLL; and one or more circuitries coupled to the FLL to adjust a power supply to the FLL according to the determined frequency of the FLL.

An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator.