In some embodiments, there is provided an apparatus including a common bus and a plurality of oscillatrode circuits coupled to the common bus, the plurality of oscillatrode circuits including a first oscillatrode circuit outputting a first frequency tone when a first input voltage is detected by the first oscillatrode circuit and a second oscillatrode circuit outputting a second frequency tone when a second input voltage is detected by the second oscillatrode circuit, wherein common bus carries the first frequency tone and the second frequency tone at different frequencies in a frequency division multiplex signal. Related systems, methods, and articles of manufacture are also disclosed.

In some embodiments, there is provided an apparatus including a common bus and a plurality of oscillatrode circuits coupled to the common bus, the plurality of oscillatrode circuits including a first oscillatrode circuit outputting a first frequency tone when a first input voltage is detected by the first oscillatrode circuit and a second oscillatrode circuit outputting a second frequency tone when a second input voltage is detected by the second oscillatrode circuit, wherein common bus carries the first frequency tone and the second frequency tone at different frequencies in a frequency division multiplex signal. Related systems, methods, and articles of manufacture are also disclosed.

With respect to a phase locked loop (PLL) circuit that receives a first reference clock and generates an output clock, the PLL circuit includes a delay circuit that delays the first reference clock to generate a second reference clock, a feedback circuit that generates a control signal based on a phase difference between the second reference clock and a feedback clock, an oscillator that oscillates at a frequency determined based on the control signal to generate the output clock, and a divider that divides the output clock in the on state. The PLL circuit switches between a first mode and a second mode, the feedback clock in the first mode is a signal obtained by retiming an output of the divider with the output clock, and the feedback clock in the second mode is a signal obtained by retiming the first reference clock with the output clock.

An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element has a rectangular shape in a plan view, and at least three of closest ones to four corners of the circuit element out of the bump members are bonded to the package at respective positions overlapping the plurality of external terminals in the plan view.

An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element has a rectangular shape in a plan view, and at least three of closest ones to four corners of the circuit element out of the bump members are bonded to the package at respective positions overlapping the plurality of external terminals in the plan view.

An electronic device may include digital circuitry that operates via digital signals and a digital to analog converter (DAC) to convert a digital signal into a modulated analog signal. The DAC may include multiple unit cells to generate an analog signal and multiple local oscillator (LO) tiles to modulate the analog signal and generate the modulated analog signal. The electronic device may also include LO circuitry to dynamically adjust an LO enable signal based at least in part on the digital signal. The LO enable signal may enable a reduced number of LO tiles supporting one or more respective sets of unit cells operatively enabled based on the digital signal.

An electronic device may include digital circuitry that operates via digital signals and a digital to analog converter (DAC) to convert a digital signal into a modulated analog signal. The DAC may include multiple unit cells to generate an analog signal and multiple local oscillator (LO) tiles to modulate the analog signal and generate the modulated analog signal. The electronic device may also include LO circuitry to dynamically adjust an LO enable signal based at least in part on the digital signal. The LO enable signal may enable a reduced number of LO tiles supporting one or more respective sets of unit cells operatively enabled based on the digital signal.

Systems and methods are provided for compensating for mechanical acceleration at a reference oscillator. A reference oscillator provides an oscillator output signal and an accelerometer on a same platform as the reference oscillator, such that mechanical acceleration at the reference oscillator is detected at the accelerometer to produce a measured acceleration. A filter assembly, having an associated set of filter weights, receives the measured acceleration from the accelerometer and provides a tuning control signal responsive to the measured acceleration to a frequency reference associated with the system. An adaptive weighting component receives the oscillator output signal of the reference oscillator and an external signal that is provided from a source external to the platform and adjusts the set of filter weights for the filter assembly based on a comparison of the external signal and the oscillator output signal.

Systems and methods are provided for compensating for mechanical acceleration at a reference oscillator. A reference oscillator provides an oscillator output signal and an accelerometer on a same platform as the reference oscillator, such that mechanical acceleration at the reference oscillator is detected at the accelerometer to produce a measured acceleration. A filter assembly, having an associated set of filter weights, receives the measured acceleration from the accelerometer and provides a tuning control signal responsive to the measured acceleration to a frequency reference associated with the system. An adaptive weighting component receives the oscillator output signal of the reference oscillator and an external signal that is provided from a source external to the platform and adjusts the set of filter weights for the filter assembly based on a comparison of the external signal and the oscillator output signal.

In an embodiment, an electronic circuit includes: a supply management circuit for receiving an input supply voltage and providing a first supply voltage; and a main circuit configured to: when the input supply voltage becomes higher than a first threshold, cause the electronic circuit to transition into an initialization state in which an oscillator is enabled and configuration data is copied from an NVM to configuration registers, and then to transition into a standby state in which the oscillator is disabled and content of the configuration registers is preserved by the first supply voltage, and, upon reception of a wakeup event, cause the configuration data from the configuration registers to be applied to the first circuit, and cause the electronic circuit to transition into an active state in which the first oscillator is enabled and the first circuit is configured to operate based on the configuration data.