Performance indicator circuitry is provided for characterizing performance of a phase locked loop (PLL) in a phase path of a polar modulator or polar transmitter that is used to generate a phase modulated RF signal. The PLL includes an oscillator, a high pass path, and a low pass path. The low pass path includes a loop filter. The performance indicator circuitry includes first input circuitry and parameter calculation circuitry. The first input circuitry is configured to input a loop filter signal from the loop filter. The parameter calculation circuitry is configured to compute a value for a performance indicator based on the loop filter signal and control or characterize an aspect of operation of the PLL based on the value.

A clock signal generating apparatus detects a phase difference between an input reference clock signal and a feedback signal to output a control signal based on the phase difference, generates the clock signal with a frequency based on the output control signal, generates a pattern by switching, at a certain time interval, between a plurality of patterns of a second phase shift amount, adds a first phase shift amount to the second phase shift amount having the generated pattern, determines a phase to be selected, so that a cycle of the phase-shifted clock signal matches the cycle of a clock signal changed by the first phase shift amount to which the second phase shift amount is added, selects the determined phase from among a plurality of phases, and generates a phase-shifted clock signal whose signal level changes in the selected phase for output as the feedback signal.

In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.

In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.

A frequency synthesizer circuit included in a sensor circuit of a computer system may include a voltage-controlled oscillator circuit that may generate an oscillator signal. A three-point injection technique may be used to modulate the frequency of the oscillator signal. The three-point injection includes a low-frequency component that drives a feedback divider, and two high-frequency components that drive the voltage-controlled oscillator circuit. The strengths of the three injection points are aligned using samples of a tune signal generated using results of a comparison of a referenced signal and a frequency divided version of the oscillator signal.

Various embodiments relate to a method for calibration of a center frequency of a BPF in an FSK transceiver, the method including the steps of filtering a carrier frequency signal by the BPF to produce a filtered signal, detecting, by a phase-frequency detector (PFD), a difference in phase between the carrier frequency signal and the filtered signal from the BPF, sweeping a calibration code of the BPF, detecting a transition in the sign of the phase difference and capturing a calibration code associated with the transition in the sign of the phase difference for calibration of the BPF.

Modulation circuitry is configured to generate a phase modulated signal having an output frequency that corresponds to a local oscillator (LO) signal divided by N.5. A phase locked loop (PLL) is configured to generate an LO signal having a frequency that is N.5 times the output frequency. Pulse circuitry configured to generate, based at least on a value of N, an edge signal including a pulse aligned with a positive edge of the LO signal and a pulse aligned with a negative edge of the LO signal. The edge signal is used to generate the phase modulated signal.

Various embodiments relate to a method for calibration of a center frequency of a BPF in an FSK transceiver, the method including the steps of filtering a carrier frequency signal by the BPF to produce a filtered signal, detecting, by a phase-frequency detector (PFD), a difference in phase between the carrier frequency signal and the filtered signal from the BPF, sweeping a calibration code of the BPF, detecting a transition in the sign of the phase difference and capturing a calibration code associated with the transition in the sign of the phase difference for calibration of the BPF.

Modulation circuitry is configured to generate a phase modulated signal having an output frequency that corresponds to a local oscillator (LO) signal divided by N.5. A phase locked loop (PLL) is configured to generate an LO signal having a frequency that is N.5 times the output frequency. Pulse circuitry configured to generate, based at least on a value of N, an edge signal including a pulse aligned with a positive edge of the LO signal and a pulse aligned with a negative edge of the LO signal. The edge signal is used to generate the phase modulated signal.

This disclosure relates to an apparatus, system, and method for generating uplink transmissions using a polar architecture including a phase locked loop with potential for two point injection. According to some embodiments, frequency resources allocated for a transmission may be determined. A cartesian baseband signal may be generated for the uplink transmission. The cartesian baseband signal may be converted to a polar baseband signal, including a baseband phase signal and an amplitude signal. Modulation parameters, potentially including whether to use one point injection or two point injection with a phase locked loop, may be determined. The baseband phase signal may be upconverted to an RF phase signal according to the determined modulation parameters. The RF phase signal may be amplified according to the amplitude signal to produce an RF signal. The RF signal may be transmitted.