A radio frequency amplifier includes a first input terminal, a second input terminal, an output terminal, and first and second amplifiers. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output coupled to the output terminal by an output inductive element. An output combiner circuit is coupled between the first amplifier output and the second amplifier output. The output combiner circuit includes a first inductive element, a capacitor, and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the capacitor, and the second inductive element is coupled between the second amplifier output and the first terminal of the capacitor. A second terminal of the capacitor is coupled to ground.

A Doherty amplifier is configured in such a way that a phase adjustment circuit adjusts either the phase of a return signal going to a first auxiliary amplification element as a result of passage of a first signal amplified by a second main amplification element through a second auxiliary amplification element as the return signal, or the phase of the return signal going to the second auxiliary amplification element as a result of reflection of the return signal by the first auxiliary amplification element, at a time of a backoff operation of the second auxiliary amplification element, in such a way that the sum of the phase of the return signal going to the first auxiliary amplification element and the phase of the return signal going to the second auxiliary amplification element is not equal to 0 degrees in the operating frequency band of the first signal.

A voltage dividing capacitor circuit includes first capacitor through third capacitor dividers and first through fourth load capacitors. The first capacitor divider includes a first flying capacitor and a plurality of first switches connected in series between a first voltage node and a ground node, and is connected to a second voltage node. The second capacitor divider is connected to the first voltage node, the second voltage node, and a first intermediate voltage node. The third capacitor divider is connected to the second voltage node, the ground voltage node, and a second intermediate voltage node. The first through fourth load capacitors are connected in series between the first voltage node and the ground node. The second capacitor divider includes a second flying capacitor and a plurality of second switches connected in series between the first voltage node and the second voltage node.

A power amplifying circuit includes a first input terminal applied with a first bias voltage, a first amplifying circuit generating a first output signal and a second output signal according to an input signal and a first matching circuit combining the first output signal and the second output signal to generate an output signal. The first amplifying circuit includes a first transistor having a first electrode coupled to the first input terminal and a second electrode applied with a second bias voltage and a second transistor having a first electrode s coupled to the first input terminal and a second electrode applied with a third bias voltage. The first transistor generates the first output signal according to the first bias voltage and the second bias voltage. The second transistor generates the second output signal according to the first bias voltage and the third bias voltage.

A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

Power amplifier supply networks with harmonic terminations are disclosed. In certain embodiments, a power amplifier system includes a first power amplifier that amplifies a first radio frequency (RF) signal of a first fundamental frequency, a second power amplifier that amplifies a second RF signal of a second fundamental frequency, and a power amplifier supply network that distributes a power amplifier supply voltage to the first power amplifier at a first distribution node and to the second power amplifier at a second distribution node. The power amplifier supply network includes a first harmonic termination circuit connected to the first distribution node that provide an open circuit at about twice the first fundamental frequency, and a second harmonic termination circuit connected to the second distribution node and that provides an open circuit at about twice the fundamental frequency.

An audio system has an amplifier for driving an audio actuator and includes a switched-mode power supply that draws power from a power source (e.g., battery) to supply power to the amplifier, a capacitor charged by the switched-mode power supply to supply power to the amplifier, and a feed-forward compressor that performs dynamic range compression of an audio input to provide an audio output for amplification by the amplifier. The compressor includes a sidechain frequency-biasing filter that generates a frequency-biased version of the audio input that is attenuated as frequency increases which causes the compressor to decrease the compression as frequency increases. A control block limits current drawn from the battery by the switched-mode power supply independent of audio input frequency, but the frequency-biasing filter enables the amplifier to service audio power transients greater than the current-limited power supply can supply by advantageously concurrently sourcing extra power from the capacitor.

According to one embodiment, a semiconductor device includes the following configuration. A detection circuit detects a state of a clock signal. An amplification circuit changes a gain based on the state of the clock signal detected by the detection circuit. An amplification circuit amplifies a first voltage with the gain and outputs a second voltage obtained as a result of amplification. A conversion circuit converts the second voltage output from the amplification circuit to first data. An isolation circuit includes a driver and a receiver electrically isolated from the driver. The driver transmits a signal corresponding to the first data to the receiver. The receiver outputs second data corresponding to the signal transmitted from the driver. The output circuit outputs the second data output from the isolation circuit.

A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.

A filter device configured to directly connect to a differential power amplifier of a transmit chain circuit. The filter device may include a transformer and a filter configured as a half lattice equivalent topology and having a single-ended output. The filter may be a lattice filter configured as a full lattice topology or a lattice equivalent filter configured as a half lattice equivalent topology. The filter includes a first branch having a first impedance network of one or more first impedance elements and a second branch having a second impedance network of one or more second impedance elements. The single-ended output of the filter device may connect to an antenna switch that is in turn connected to an antenna.