H03F2200/186

HIGH-EFFICIENCY AMPLIFIER ARCHITECTURE WITH DE-GAIN STAGE

The present invention provides an amplifier including an input stage, an amplifier stage, a power stage and a de-gain stage. The input stage is configured to receive an input signal to generate an amplified signal. The amplifier stage is configured to generate a first driving signal and a second driving signal according to the amplified signal. The power stage comprises a first input terminal and a second input terminal, wherein the power stage is coupled to a supply voltage and a ground voltage, for receiving the first driving signal and the second driving signal from the first input terminal and the second input terminal, respectively, and generating an output signal.

Memory effect reduction using low impedance cascode biasing

A circuit includes a reference voltage circuit, a filter circuit configured to receive an output of the reference voltage circuit, and a voltage follower configured to receive an output of the filter circuit and generate a bias voltage. The filter circuit is configured to combine signals on a reference ground with the output of the reference voltage circuit. A method of providing a bias voltage includes generating a reference voltage using a reference voltage circuit, filtering the reference voltage to generate a second voltage using a filter circuit, and generating the bias voltage according to the second voltage using a voltage follower circuit. Filtering the reference voltage includes combining a fluctuation of the reference ground with the reference voltage.

Current sensing circuitry

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

ACTIVE GROUND BOUNCE NOISE CANCELATION TECHNIQUE FOR CLOSED LOOP ANALOG REGULATION
20230136057 · 2023-05-04 ·

A differential feedback circuit with an active noise cancelation technique using a dual input differential pair. In the differential feedback circuit, a feedback voltage and a reference voltage connect to a primary input pair. Sensed noise at the inputs is put to a secondary input pair of the differential amplifier, which is inverted with respect to the primary input pair. In other words, the reference voltage, which may be subject to noise, connects directly to one terminal of the secondary input pair and through a low-pass filter to another terminal of the secondary input pair so that the noise, which may be coupled to the differential feedback circuit, cancels at the output of the differential feedback circuit.

Integrated circuit and light receiver
11444581 · 2022-09-13 · ·

An integrated circuit includes an amplifier for amplifying an electric current signal from an external light receiving element, and a low-pass filter. The low-pass filter has a resistor and a capacitor serial-connection in which multiple capacitive elements are serially connected. With respect to the resistor in the low-pass filter, one end thereof is connected to a power terminal to which the bias voltage is inputted, and the other end thereof is connected to an input terminal of the capacitor serial-connection and to a bias application electrode of the light receiving element through which the bias voltage is applied. With respect to the capacitor serial-connection in the low-pass filter, each connection terminal between two of the serially connected capacitive elements and an output terminal of the capacitor serial-connection, are connected to their respective capacitance terminals to which a ground potential as a reference for the bias voltage is connected selectively.

CURRENT SENSING CIRCUITRY

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

INTEGRATED CIRCUIT AND LIGHT RECEIVER
20210006209 · 2021-01-07 · ·

An integrated circuit includes an amplifier for amplifying an electric current signal from an external light receiving element, and a low-pass filter. The low-pass filter has a resistor and a capacitor serial-connection in which multiple capacitive elements are serially connected. With respect to the resistor in the low-pass filter, one end thereof is connected to a power terminal to which the bias voltage is inputted, and the other end thereof is connected to an input terminal of the capacitor serial-connection and to a bias application electrode of the light receiving element through which the bias voltage is applied. With respect to the capacitor serial-connection in the low-pass filter, each connection terminal between two of the serially connected capacitive elements and an output terminal of the capacitor serial-connection, are connected to their respective capacitance terminals to which a ground potential as a reference for the bias voltage is connected selectively.

Ground intermediation for inter-domain buffer stages

Techniques are described for ground-intermediating buffering that can effectively use the reference grounds of the circuit domains on either side of a buffer stage to generate one or more intermediated grounds for one or more signal buffers. For example, one of the reference grounds has a first amount of ground noise, the other of the reference grounds has a second amount of ground noise that is greater than or less than the first amount, and the intermediated grounds are generated to have respective amounts of ground noise that are between the first and second amounts. The ground intermediating buffer can perform signal buffering with respect to the intermediated ground(s), thereby reducing ground noise coupling across the circuit domains through both the signal and ground paths of the buffer stage.

Power amplifiers isolated by differential ground

Apparatus and methods for power amplifiers isolated by differential ground are provided. In certain implementations, a mobile device includes a transceiver that generates a plurality of radio frequency input signals including a first radio frequency input signal and a second radio frequency input signal, and a plurality of differential power amplifiers including a first differential power amplifier that provides amplification to the first radio frequency input signal and a second differential power amplifier that provides amplification to the second radio frequency input signal. The first differential power amplifier and the second differential power amplifier each operate with differential ground so as to provide isolation between the first differential power amplifier and the second differential power amplifier.

GROUND INTERMEDIATION FOR INTER-DOMAIN BUFFER STAGES
20200136620 · 2020-04-30 ·

Techniques are described for ground-intermediating buffering that can effectively use the reference grounds of the circuit domains on either side of a buffer stage to generate one or more intermediated grounds for one or more signal buffers. For example, one of the reference grounds has a first amount of ground noise, the other of the reference grounds has a second amount of ground noise that is greater than or less than the first amount, and the intermediated grounds are generated to have respective amounts of ground noise that are between the first and second amounts. The ground intermediating buffer can perform signal buffering with respect to the intermediated ground(s), thereby reducing ground noise coupling across the circuit domains through both the signal and ground paths of the buffer stage.