A power supply switch circuit includes a switch circuit including a first switch configured to switch a first power source voltage to a power supply terminal of a power amplifier, and a second switch configured to switch a second power source voltage to the power supply terminal; a switch controller configured to control the switch circuit; and a power supply circuit configured to supply a third power source voltage to the power supply terminal when a first voltage of the power supply terminal is lower than a predetermined second voltage.

A multi-band power amplifier module includes at least one transmission input terminal, at least one power amplifier circuit that receives a first transmission signal and a second transmission signal through the at least one transmission input terminal, a first filter circuit that allows the first transmission signal to pass therethrough, a second filter circuit that allows the second transmission signal to pass therethrough, at least one transmission output terminal through which the first and second transmission signals output from the first and second filter circuits are output, a transmission output switch that outputs each of the first and second transmission signals output from the at least one power amplifier circuit to the first filter circuit or the second filter circuit, and a first tuning circuit that adjusts impedance matching between the at least one power amplifier circuit and the at least one transmission output terminal.

Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices. The buffer provides high supply noise rejection ratio (PSRR) together with high bandwidth.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A read-out circuit includes an operational amplifier configured to receive an input voltage through a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging and discharging circuit configured to charge or discharge a sensor during a first time; a switching circuit connecting the sensor and the operational amplifier during a second time after the sensor is charged or discharged; and a duty control circuit configured to determine a duty ratio of the first time and the second time according to a capacitance of the sensor.

RF signal amplifiers are provided that include an RF input port, one or more active RF output ports, one or more passive RF output ports, an active communication path, and a passive communication path. Various embodiments include one or more switching devices, one or more directional couplers, one or more diplexers, a power divider network, and/or an attenuator.

A transceiver includes a first common T-coil circuit coupled to a first input-output pin of the transceiver, a termination impedance coupled to the first common T-coil circuit and configured to match an impedance of a transmission line coupled to the first common T-coil circuit, an amplifier configured to receive an input signal from the first input-output pin through the first common T-coil circuit based on a receive enable signal, and a first transmission buffer configured to transmit an output signal to the first input-output pin through the first common T-coil circuit based on a transmit enable signal.

A read-out circuit includes an operational amplifier configured to receive input voltage via a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor included in a sensor during a first time; and a switching circuit configured to connect the sensor capacitor and the operational amplifier during a second time after the sensor capacitor is charged or discharged.

A receiver front end (300) having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch (235) is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch (260) is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A circuit device includes an analog front-end circuit that receives a target signal is input, and a processing circuit that performs arithmetic processing based on an output signal from the analog front-end circuit. The analog front-end circuit includes a plurality of comparator circuits that compare the voltage level of the target signal to a plurality of threshold voltages and output a plurality of comparison result signals. The processing circuit obtains the transition timing of the target signal based on the comparison result signals and delayed-time information of the analog front-end circuit.