A semiconductor device includes a temperature-independent current generator that generates a reference current substantially independent of temperature and a mirror current that is a substantial duplicate of the reference current, a pulse signal generator that samples the mirror current so as to generate a pulse signal, and a counter that obtains a number of pulse signals generated by the pulse signal generator, that permits the pulse signal generator to generate a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is less than a predetermined threshold value, and that inhibits the pulse signal generator from generating a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is equal to the predetermined threshold value. A method for monitoring a temperature of the semiconductor device is also disclosed.

A method for a fast settling ripple reduction loop for high speed precision chopper amplifiers includes amplifying an input signal with a signal path to generate a first output, the signal path comprising chopping the input signal to generate a first chopper output, amplifying the first chopper output with an amplifier to generate an amplifier output and chopping the amplified output to generate a second chopper output. An output ripple of the first output is reduced with a Ripple Reduction Loop comprising chopping the second chopper output to generate a third chopper output, filtering the third chopper output with a filter to generate a Direct Current (DC) offset correction, and combining the DC offset correction with the amplifier output, wherein the third chopper output is driven to the output voltage of the filter and the RRL is disconnected from the low frequency signal path in response to a non-linear event.

Isolated circuit systems are provided. The systems include a primary side circuit and a secondary circuit, electrically isolated from each other. The primary side and secondary side circuits each utilize a direct current (DC) reference signal. The primary side circuit may use the DC reference signal in a modulation operation. The secondary side circuit may use the DC reference signal in a demodulation operation. The DC reference signal may be sent from the primary side circuit to the secondary side circuit, or from the secondary side circuit to the primary side circuit.

Disclosed is a capacitive sensor chip based on a power-aware dynamic charge-domain amplifier array. The capacitive sensor chip is based on a zoom architecture and includes: an architecture having two or more stages for capacitive quantization in which a first stage performs coarse quantization using a successive approximation register (SAR) and a second stage performs fine quantization using a delta-sigma modulator, an amplifier in the capacitive sensor chip is powered by a floating capacitor, the floating capacitor is connected to a power supply to being charged and connected to the amplifier to power the amplifier by controlling switches; a first-order integrator of the delta-sigma modulator includes an amplifier array having a scale of N bits and 2.sup.N amplifiers where N is a positive integer. By the capacitive sensor chip based on the power-aware dynamic charge-domain amplifier array, utilization efficiency of charges can be effectively improved, power consumption overheads nay be effectively saved, energy efficiency of a system is greatly improved and a driving capability of the subsequent-stage amplifier may be adaptively distributed according to the size of an input capacitance.

An amplifier includes: a signal polarity inversion circuit which modulates an input signal and outputs a modulation signal; an amplifier circuit which is constituted from an operational transconductance amplifier (OTA) to amplify the modulation signal and output a current; and a sample-hold circuit having a sampling capacitor which is charged and discharged by selective sampling of the output current of the amplifier circuit and a holding capacitor to which the voltage of the sampling capacitor is transferred.

A method may include receiving, by a calibration circuit, an output of a subsystem comprising the sensor and the analog front end. The method may further include separating the output individually into the sensor offset and the amplifier offset by using inherent properties of separate frequency ranges for the sensor offset and the amplifier offset. The method may also include calibrating, by the calibration circuit, the sensor offset by determining a first calibration value for the sensor offset such that the output approximates zero during an idle-channel condition. The method may additionally include calibrating, by the calibration circuit, the amplifier offset by determining a second calibration value for the amplifier offset such that the output approximates zero during the idle-channel condition.

In examples of a chopper operational amplifier, a current control circuit comprises a pair of voltage sources, each of which may be varied to generate a voltage signal of a particular value, and multiple inverters, each of which is configured to receive either a clock signal or its complement signal and one of the voltage signals. Based on these inputs, each inverter generates a control signal that is delivered to a corresponding switch in the input stage of the chopper operational amplifier to control the gate voltage of that switch. Based on the difference between the values of the voltage signals, the current control circuit operates to reduce the amplitudes of base currents induced by charge injection at the input terminals of the chopper operational amplifier.

An analog signal processing circuit can include a front-stage processing module configured to process an analog signal to generate a first differential signal; at least one switched capacitor circuit, coupled with the front-stage processing module to receive the first differential signal, and configured to integrate or sample and hold the first differential signal to generate a second differential signal; and where the front-stage processing module and the at least one switched capacitor circuit receive synchronous control signals, the front-stage processing module chops the analog signal according to the control signals, and the at least one switched capacitor circuit is in different operating modes at a first phase and a second phase of an operation cycle of the control signals, in order to eliminate DC offset voltages of the front-stage processing module and the at least one switched capacitor circuit.

A detecting device includes a pyroelectric element that generates charge by a pyroelectric effect in a first detection terminal and a second detection terminal, a chopper amplifier circuit that generates an amplified signal in response to the charge generated in the first detection terminal and the second detection terminal by chopping, and an initialization switch that controls electrical connection between the second detection terminal and a power source for generating an initialized voltage, and the initialization switch is turned on before a start of an amplification operation by the amplifier circuit and is off during the amplification operation.

An active electrode has an electrode for sensing an electric potential and generating an input signal, and a shield placed near the electrode but being electric insulated from the electrode. An integrated amplifier (10) has an input connected to the at least one electrode for receiving the input signal, and providing a buffered path outputting a buffered output signal. The shield being connected to the output of the integrated amplifier to actively drive the electrical potential of the shield, thereby providing an active shielding of the electrode. The buffered path includes a first mixer (11) in front of the integrated amplifier for frequency shifting the input signal from a basic frequency range to a higher frequency range, and a second mixer (12) on the output of the integrated amplifier for frequency shifting the amplified signal from the higher frequency range back to the basic frequency range. The active electrode may be used for recording EEG signals.