An open loop process and temperature independent bias circuit for stacked device amplifiers is disclosed herein. In one or more embodiments, a method for biasing a stacked high-voltage signal amplifier with a voltage divider bias module comprises generating, by the voltage divider bias module from a power supply voltage (VDD), a plurality of control voltage biases, which comprise a plurality of voltage references plus an offset voltage term (Vtemp). In one or more embodiments, the plurality of voltage references are each proportional to a division of the power supply voltage (VDD), and the offset voltage term (Vtemp) is proportional to temperature and is a function of process variation. The method further comprises biasing, a plurality of devices of the stacked high-voltage signal amplifier, with the control voltage biases.

A depletion mode FET having a source electrode connected to ground; and a bias circuit for producing a bias current for a gate electrode of the FET. The bias circuit includes a pair of source follower transistors circuits; a first one of the pair of two source follower transistor circuits being coupled between a first voltage supply having a first polarity relative to the ground potential and a second voltage supply having a second polarity relative to ground potential, the first polarity being opposite to the second polarity, the first one of the pair of the source follower transistor circuits supplying a control signal to a second one of the pair of source follower transistor circuits. The second one of the pair of source follower transistors circuits is coupled between the second voltage supply and the ground potential and wherein the second one of the pair of source follower transistor circuits produces a bias signal for the control electrode of the output transistor.

An open loop process and temperature independent bias circuit for stacked device amplifiers is disclosed herein. In one or more embodiments, a method for biasing a stacked high-voltage signal amplifier with a voltage divider bias module comprises generating, by the voltage divider bias module from a power supply voltage (VDD), a plurality of control voltage biases, which comprise a plurality of voltage references plus an offset voltage term (Vtemp). In one or more embodiments, the plurality of voltage references are each proportional to a division of the power supply voltage (VDD), and the offset voltage term (Vtemp) is proportional to temperature and is a function of process variation. The method further comprises biasing, a plurality of devices of the stacked high-voltage signal amplifier, with the control voltage biases.