Aspects of the disclosure relate to a radio frequency phase shifter. An example includes an amplification stage to produce an amplified voltage, the amplification stage having a first amplifier with a first input coupled to a first output of a hybrid coupler and a second amplifier with a complementary second input coupled to a complementary second output of the hybrid coupler. A vector modulation stage coupled to the amplification stage receives the amplified voltage and produces a modulated vector, the vector modulation stage has an in-phase section and a quadrature section to control the phase of the modulated vector in response to a phase control signal. A varactor coupled across the first input and the second input of the amplification stage adjusts the capacitance between the first input and the second input in response to a capacitance control signal.

Aspects of the disclosure relate to a local oscillator frequency divider for a receiver or transmitter. In this regard a frequency divider has a first frequency input coupled to a first oscillator frequency output, a second frequency input coupled to a complementary second oscillator frequency output, a first in-phase/quadrature (I/Q) divided frequency output, and a complementary second I/Q divided frequency output. The frequency divider further has a first alternating current (AC) coupling capacitor between the first frequency input and the first oscillator frequency output and a second AC coupling capacitor between the second frequency input and the second oscillator frequency output.

A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

An apparatus is disclosed for bidirectional amplification with phase-shifting. In example implementations, an apparatus includes a phase shifter with a bidirectional amplifier. The bidirectional amplifier includes a first transistor coupled between a first plus node and a second minus node, a second transistor coupled between a first minus node and a second plus node, a third transistor coupled between the first plus node and the second minus node, and a fourth transistor coupled between the first minus node and the second plus node. The bidirectional amplifier also includes a fifth transistor coupled between the first plus node and the second plus node, a sixth transistor coupled between the first minus node and the second minus node, a seventh transistor coupled between the first plus node and the second plus node, and an eighth transistor coupled between the first minus node and the second minus node.

A Doherty power amplifier comprising: an input configured to receive an input signal to be amplified and to split the input signal into a first portion and a second portion, the input signal having an operating frequency; a carrier amplifier path coupled to the input to receive the first portion, the carrier amplifier path including a carrier amplifier coupled to a differential inverter, the carrier amplifier being configured to amplify the first portion and provide an amplified first portion to the differential inverter, the differential inverter having a capacitance configured to make the differential inverter behave as a short circuit at odd harmonics of the operating frequency, the capacitance coupling a first path and a second path of the differential inverter in parallel; and a peaking amplifier path coupled to the input to receive the second portion and comprising a peaking amplifier configured to amplify the second portion.

An active feedback low-noise amplifier includes a feedback transistor whose source couples through a feedback path to an input signal node. A bias transistor biases the source of the feedback transistor with a bias current responsive to an input signal carried on the input signal node.

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The amplifier circuitry is operable in a non-carrier-aggregation mode and a carrier aggregation mode. The amplifier circuitry may include an input transformer that is coupled to multiple amplifier stages such as a common gate amplifier stage, a cascode amplifier stage, and a common source amplifier stage. The common gate amplifier stage may include switches for selectively activating a set of cross-coupled capacitors to help maintain input impedance matching in the non-carrier-aggregation mode and the carrier-aggregation mode. The common source amplifier stage may include additional switches for activating and deactivating the common source amplifier stage to help maintain the gain in the non-carrier-aggregation mode and the carrier-aggregation mode.

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.