A class D amplifier output stage including an input for receiving an input signal, an output for providing an output signal to a load, serially coupled upper and lower switching devices configured to provide an output signal to the output, a driver circuit configured to receive the input signal, and to derive therefrom first and second drive signals for driving the upper and lower switching devices alternately from a conducting state into a non-conducting state and vice versa, such that the conducting state periods of the upper switching device with respect to those of the lower switching device are mutually exclusive and separated by dead time intervals during which both upper and lower output transistors are non-conducting. To reduce distortion and more particularly, total harmonic distortion (THD), the amplifier output stage includes a substantially linear circuit configured to provide a bidirectional current sink for residual currents from the load occurring during at least part of each dead time interval.

Provided is a preamplifying circuit, including a first amplifier and a second amplifier sequentially connected in series, wherein an output end of the second amplifier is connected to a circuit output end, and an input end of the first amplifier is connected to a circuit input end. The preamplifying circuit further includes a positive feedback branch including a diode group and a third amplifier, wherein one end of the diode group is connected to the input end of the first amplifier. The positive feedback circuit can positively feed part of signals back to the other end of the diode group, so that voltage drops at two ends of the diode group can be reduced, and harmonic distortion caused by nonlinearity of the diode group is reduced. Thus, the sound quality detected by a microphone sensor is improved.

Methods and systems are described that include a differential amplifier driving an active load circuit, the active load circuit having a pair of load transistors and a high-frequency gain stage providing high frequency peaking for the active load circuit according to a frequency response characteristic determined in part by resistive values of a pair of active resistors connected, respectively, to gates of the pair of load transistors, and a bias circuit configured to stabilize the high frequency peaking of the high-frequency gain stage by generating a process-and-temperature variation (PVT)-dependent control voltage at gates of the active resistors to stabilize the resistive values of the pair of active resistors to account for PVT-dependent voltages at the gates of the pair of load transistors.

A power amplifier includes an amplifying circuit, including an amplifying transistor configured to amplify an input signal and configured to output an output signal, a bias circuit, including a bias transistor comprising an emitter configured to provide a bias current into a base of the amplifying transistor, and a base into which a control current is input, and an overcurrent protecting circuit configured to bypass the control current into a ground, according to a current level of the output signal.

A power amplifier includes an amplifying circuit, including an amplifying transistor configured to amplify an input signal and configured to output an output signal, a bias circuit, including a bias transistor comprising an emitter configured to provide a bias current into a base of the amplifying transistor, and a base into which a control current is input, and an overcurrent protecting circuit configured to bypass the control current into a ground, according to a current level of the output signal.

A bias compensation circuit, coupled to an amplifying transistor, is disclosed. The bias compensation circuit comprises a voltage locking circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to a third terminal the amplifying transistor, and the second terminal is coupled to a control terminal of the amplifying transistor; and a first resistor, coupled to the first terminal of the voltage locking circuit; wherein when the voltage locking circuit is conducted, a voltage difference between the first terminal and the second terminal is substantially constant.

A method for improving the linearity of a radio frequency power amplifier, a compensation circuit (307) for implementing the method, and a communications terminal with the compensation circuit (307). In the method, a compensation circuit (307) is connected between a base (a3) and a collector (b3) of a transistor of a common emitter amplifier (306), in order to neutralize the impact of a variation in capacitance between the base (a3) and the collector (b3) of the transistor (306) according to a radio frequency signal. No additional direct-current power consumption is needed, and degradation in performance of other radio frequency power amplifiers can be avoided. The corresponding compensation circuit (307) can be easily integrated with a main amplification circuit, without affecting other performance of the main amplification circuit, and provides high adjustability.

A signal transfer circuit includes a transmission circuit, a conversion circuit and a sensing output circuit. The transmission circuit outputs a driving signal to a signal line. The conversion circuit receives an input signal that is a single-ended signal transferred through the signal line and converts the input signal to a differential signal including a first output amplified signal and a second output amplified signal. The first output amplified signal swings downwardly from a first output DC level and the second output amplified signal swings upwardly from a second output DC level that is lower than the first output DC level. The sensing output circuit generates an output signal based on the differential signal. The number of the signal lines is reduced without decrease in performance of signal transfer, and sizes of the signal transfer circuit and the device including the signal transfer circuit are reduced.

Methods and systems are described that include a differential amplifier driving an active load circuit, the active load circuit having a pair of load transistors and a high-frequency gain stage providing high frequency peaking for the active load circuit according to a frequency response characteristic determined in part by resistive values of a pair of active resistors connected, respectively, to gates of the pair of load transistors, and a bias circuit configured to stabilize the high frequency peaking of the high-frequency gain stage by generating a process-and-temperature variation (PVT)-dependent control voltage at gates of the active resistors to stabilize the resistive values of the pair of active resistors to account for PVT-dependent voltages at the gates of the pair of load transistors.

The operational amplifier disclosed includes an input stage configured to receive power from a floating supply in a low voltage range that can float according to the common mode voltage at the input. The floating supply facilitates the use of low voltage components that can improve the precision of the operational amplifier by lowering the offset voltage. The input stage includes a first gain stage including field effect transistors and a second gain stage using bipolar transistors. The gain stages can be implemented differently to accommodate different applications and fabrication capabilities.