Integrated circuits, such as power amplifier integrated circuits, are disclosed containing compact-footprint, vertically-integrated capacitor-avalanche diode (AD) structures. In embodiments, the integrated circuit includes a semiconductor substrate, a metal layer system, and a vertically-integrated capacitor-AD structure. The metal layer system includes, in turn, a body of dielectric material in which a plurality of patterned metal layers are located. The vertically-integrated capacitor-AD structure includes a first AD formed, at least in part, by patterned portions of the first patterned metal layer. A first metal-insulator-metal (MIM) capacitor is also formed in the metal layer system and at least partially overlaps with the first AD, as taken along a vertical axis orthogonal to the principal surface of the semiconductor substrate. In certain instances, at least a majority, if not the entirety of the first AD vertically overlaps with the first MIM capacitor, by surface area, as taken along the vertical axis.

A biased-transistor-module comprising: a module-input-terminal; a module-output-terminal; a reference-terminal; a module-supply-terminal configured to receive a supply voltage; a module-reference-voltage-terminal configured to receive a module reference voltage; a main-transistor having a main-control-terminal, a main-first-conduction-channel-terminal and a main-second-conduction-channel-terminal, wherein the main-first-conduction-channel-terminal is connected to the module-output-terminal, and the main-second-conduction-channel-terminal is connected to the reference-terminal, and the main-control-terminal is connected to an input-signal-node, wherein the input-signal-node is connected to the module-input-terminal; and a bias-circuit. The bias-circuit comprises: a first-bias-transistor; a first-bias-resistor; a second-bias-transistor; and a second-bias-resistor.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

The invention relates to an electrical circuit in the form of a transimpedance amplifier stage, and to a method for operating this circuit. The invention furthermore relates to a circuit containing at least one signal amplifier that has at least one output connection, at least one input connection or at least one pair of differential input connections and at least two voltage supply connections, one of which may also be an earth or ground connection, wherein the signal amplifier has at least one additional connection that is connected internally to at least one of the input connections or the input connection via at least one further component, for example a diode.

The present disclosure relates to a semiconductor apparatus and a potential measuring apparatus capable of preventing deterioration in signal characteristics due to parasitic capacitance caused by providing a configuration for realizing an electrode plating process when an electrode and an amplifier are provided on the same substrate. When a power source supplies a potential necessary for plating processing and a breaker reads a signal from liquid, and an amplifier amplifies and outputs the signal, the power source required for the plating processing is blocked with respect to the electrode. This is applicable to the potential measuring apparatus.

Methods and apparatus for limiting the input voltage (swing) of a power amplifier, such as a power amplifier in a radio frequency (RF) front-end of a wireless device. One example radio frequency front-end circuit generally includes a power amplifier, a matching circuit having an output coupled to an input of the power amplifier, and an overvoltage protection circuit coupled to the matching circuit. With an overvoltage protection circuit coupled to the matching circuit in this manner, the power amplifier may have enhanced ruggedness performance.

According to one embodiment, a semiconductor circuit includes a first transimpedance amplifier and a second transimpedance amplifier. The first transimpedance amplifier is configured to convert an input current to a first output voltage and output the first output voltage from a first output terminal when a reference voltage is supplied to a first input terminal and the input current is supplied to a second input terminal. The second transimpedance amplifier has a circuit configuration similar to a circuit configuration of the first transimpedance amplifier. The second transimpedance amplifier is configured to output a second output voltage from a second output terminal when the reference voltage is supplied to a third input terminal.

There is provided a to-be-protection circuit that is high in operation accuracy and that prevents overvoltage on a protected circuit. A protection circuit is configured to protect a to-be-protected circuit from overvoltage. The to-be-protected circuit is connected to an external output terminal. The protection circuit includes: a current path unit connected to the external output terminal and including at least one first element; a reference voltage generation unit which generates and outputs a reference voltage; and an amplifier circuit outputs a target voltage based on a difference between a first input voltage and a second input voltage. The amplifier circuit operates using the reference voltage as the first input voltage and using a feedback voltage based on the target voltage as the second input voltage, and outputs the target voltage to the current path unit. The reference voltage generation unit includes at least one second element having an operating characteristic corresponding to an operating characteristic of the at least one first element of the current path unit, and generates the reference voltage based on a voltage drop caused by the at least one second element.

Power amplifiers having improved gate oxide integrity are disclosed. In particular, a dynamic asymmetric cascode bias circuit is used to provide a bias signal to a cascode power amplifier stage. The bias signal swings in synchronicity with an output signal from the power amplifier stage. By having this dynamic bias signal, the gate-drain stress on the device is reduced, preserving gate oxide integrity. Preserving gate oxide integrity helps preserve the operational profile and extend device life, providing an enhanced user experience.

An automated testing system comprises a high side switch circuit coupled to an input/output (I/O) connection, a low side switch circuit coupled to the I/O connection, a high side force amplifier (HFA) coupled to the high side switch, a low side force amplifier (LFA) coupled to the low side switch, an adjusting circuit coupled to the HFA and the LFA, and a control circuit configured to change the adjusting circuit to change control of current at the I/O connection from one of the HFA or LFA to the other of the HFA or LFA.