A compensation circuit, chip, method and device, a storage medium, and an electronic device are disclosed. The compensation circuit may include an analog module (102) including an input node (1022) and an output node (1024), wherein the input node (1022) is configured to receive an input signal and the output node (1024) is configured to output an output signal; and a linearity compensation module (104) including a plurality of transconductance units (1042), where the plurality of transconductance units (1042) are configured to acquire a first configuration signal and configure a combination of the plurality of transconductance units (1042) based on the first configuration signal to provide a compensation signal to the output node (1024), and the first configuration signal is configured to indicate a signal at any position in the analog module (102).

A feedforward amplifier comprises a power amplifier that generates an amplified signal, an error correcting circuitry that generates a first error signal and a second error signal based on an error in the amplified signal; and an output circuitry. The output circuitry comprises: a first quadrature coupler, an output of a first error amplifier is connected to the quadrature coupler and an input of the first error amplifier is configured to receive the first error signal, and an output of a second error amplifier is connected to the quadrature coupler and an input of the second error amplifier is configured to receive the second error signal. The output circuitry generates an error compensation signal in the first quadrature coupler from the output signals of the first and second error amplifiers.

A method and system for digital feed-forward linearization. The system includes a main transmit path and an auxiliary transmit path. The main transmit path includes circuitries configured to process a transmit signal for transmission. The main transmit path includes a power amplifier (PA) for amplifying the transmit signal. The auxiliary transmit path includes circuitries configured to generate, in a digital domain, a distortion error signal corresponding to a distortion introduced to the transmit signal due to a non-linear characteristics of the PA in the main transmit path and convert the distortion error signal to an analog distortion error signal. The analog distortion error signal is combined with an output of the PA in the main transmit path. The auxiliary transmit path comprises a PA model circuit that mimics the behavior of the PA to generate a distorted transmit signal in a digital domain.

A method and base station transmitter for providing offline tuning of a base station transmitter. The base station transmitter includes a feed-forward power amplifier comprising a Radio Frequency (RF) input and an RF output. The base station transmitter also includes a simulated carrier generator operatively coupled to the feed-forward power amplifier prior to the carrier cancellation loop. The simulated carrier generator provides a simulated carrier signal including one or more individual carrier frequencies to the RF input. The base station transmitter also includes a processor that is operatively coupled to the feed-forward power amplifier and the simulated carrier generator. The processor performs tuning of a carrier cancellation loop using the simulated carrier signal when the processor determines that a carrier signal is not present.

Apparatus and method for extended operational bandwidth amplifiers with fractional instantaneous bandwidth feed forward correction. In one embodiment, the method includes amplifying a radio frequency (RF) input signal to provide an amplified RF signal and introducing a first delay in the amplified RF signal. The method also includes receiving an error signal of the amplified RF signal and centering a correction bandwidth with respect to the amplified RF signal. The method also includes amplifying the error signal and combining the amplified RF signal and the amplified error signal to reduce an error in the amplified RF signal. The first delay is smaller than a second delay caused by the error path.

Apparatus and method for extended operational bandwidth amplifiers with fractional instantaneous bandwidth feed forward correction. In one embodiment, the method includes amplifying a radio frequency (RF) input signal to provide an amplified RF signal and introducing a first delay in the amplified RF signal. The method also includes receiving an error signal of the amplified RF signal and centering a correction bandwidth with respect to the amplified RF signal. The method also includes amplifying the error signal and combining the amplified RF signal and the amplified error signal to reduce an error in the amplified RF signal. The first delay is smaller than a second delay caused by the error path.

The present disclosure relates to a power amplifier (PA) system provided in a semiconductor device and having feed forward gain control. The PA system comprises a transmit path and control circuitry. The transmit path is configured to amplify an input radio frequency (RF) signal and comprises a first tank circuit and a PA stage. The control circuitry is configured to detect a power level associated with the input RF signal and control a first bias signal provided to the PA stage based on a first function of the power level and control a quality factor (Q) of the first tank circuit based on a second function of the power level.

Provided are feedforward amplifier circuit, audio amplifier and audio playing device, including: a main amplifier circuit, an adder circuit, a sub-amplifier circuit and a subtractor circuit, wherein the main amplifier circuit adds distortion to a first input signal to output a distorted signal, and inputs the distorted signal to the adder circuit and the subtractor circuit for performing feedforward correction; the sub-amplifier circuit amplifies a second input signal and serves as a positive input of the subtractor, so that a signal gain output by the subtractor is equal to a signal gain of the main amplifier; the subtractor circuit, with the distorted signal as a negative input, reversely amplifies the distorted signal and afterwards performs feedforward; and the adder circuit superimposes the distorted signal output by the main amplifier circuit and the reversely amplified distorted signal output by the subtractor, so as to output a distortion-free signal.

Amplifier error correction circuits are disclosed, including in an example an amplifier error correction circuit. The amplifier error correction circuit comprises a plurality of sub-amplifiers, a first input adapted to receive an output signal of an amplifier circuit, and an error signal input adapted to receive an error signal indicative of an error in the output signal of the amplifier circuit. The amplifier error correction circuit also comprises a sub-amplifier input signal preparation circuit adapted to provide a respective portion of the error signal to each of the sub-amplifiers, and an output signal combining circuit adapted to combine outputs of the sub-amplifiers with the output signal of the amplifier circuit and to provide a combined signal to an output of the amplifier correction circuit. At least one of the sub-amplifiers comprises a cascode amplifier.

An apparatus includes a circuit and a shifter. The circuit may be configured to generate a control signal based on a reference voltage and a plurality of characteristics of an amplifier. The shifter may be configured to (i) receive an input signal carrying a pulse burst having a plurality of pulses, (ii) shift a plurality of phases of the pulses in the pulse burst in response to the control signal, and (iii) present the pulses as shifted in an output signal.