Power amplification system with variable supply voltage. A power amplification system can include a power amplifier and a boost converter configured to provide a supply voltage to the power amplifier. The power amplification system can include a control system configured to provide a boost converter control signal to the boost converter to adjust the supply voltage based on a parameter associated with the power amplifier.

An active electronically scanned array (AESA) includes a plurality of power amplifiers including first power amplifiers and second power amplifiers. The first power amplifiers are biased by a first drain voltage. The second power amplifiers are biased by a second drain voltage. The second drain voltage is different from the first drain voltage.

Systems, devices and methods related to diversity receivers. In some embodiments, a receiving system can include a controller configured to selectively activate one or more of a plurality of paths between an input and an output, and a plurality of amplifiers, with each one of the plurality of amplifiers disposed along a corresponding one of the plurality of paths and configured to amplify a signal received at the amplifier. The receiving system can further include two or more of features including (a) variable-gain amplifiers, (b) phase-shifting components, (c) impedance matching components, (d) post-amplifier filters, (e) a switching network, and (f) flexible band routing. In some embodiments, such a receiving system can be implemented as a diversity receive (DRx) module.

Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

A power amplifier module includes a first substrate and a second substrate, at least part of the second substrate being disposed in a region overlapping the first substrate. The second substrate includes a first amplifier circuit and a second amplifier circuit. The first substrate includes a first transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; a second transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; and multiple first conductors disposed in a row between the first transformer and the second transformer, each of the multiple first conductors extending from the wiring layer on a first main surface to the wiring layer on a second main surface of the substrate.

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

In various embodiments, a semiconductor package includes a carrier amplifier connected to a first output of a power divider, and a first output matching network connected to the carrier amplifier and an output combining node. The first output matching network exhibits a phase delay during operation of the carrier amplifier. The semiconductor package includes a phase advance network connected to the first output matching network. The phase advance network is configured to offset at least a portion of the phase delay of the first output matching network. The semiconductor package includes a peaking amplifier connected to a second output of the power divider and the output combining node, and a second output matching network connected to the peaking amplifier.

An in-line waveguide divider divides power of an incoming high-frequency signal among openings. Amplification boards disposed on a base are provided for respective openings and are each connected in parallel with one another to the in-line waveguide divider. An in-line waveguide combiner includes openings formed correspondingly to the amplification boards, and is connected to the amplification boards. An electrically conductive amplifier cover includes walls formed to provide isolation between circuits of the amplification boards continuously from the in-line waveguide divider to the in-line waveguide combiner, and the entire surface of the amplification boards at the in-line waveguide combiner side is covered with the electrically conductive amplifier cover except openings and openings. Each of the amplification boards includes a waveguide-to-microstrip transition corresponding to the opening, an amplifier element, and a microstrip-to-waveguide transition corresponding to the opening.

A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

A solid-state amplifier architecture is disclosed. In some embodiments, the disclosed architecture may include first and second channel chipsets configured to amplify either the entire instantaneous frequency band of a radio frequency (RF) input signal or, respectively, sub-bands thereof, which may be divided proportionally between the two chipsets. In some cases, the chipsets may be configured to amplify frequencies in excess of the entire K-band and K.sub.a-band frequencies simultaneously. In some cases, the architecture may be configured to address a signal received, for instance, from an electronic warfare (EW) system to a log amplifier stage configured to output a signal to the EW system, in response to which the EW system may generate a RF signal for amplification by the architecture for transmission. To facilitate heat dissipation, the architecture may be coupled, in part or in whole, with a thermally conductive carrier, optionally with an intervening diamond heat spreader layer.