Patent classifications
H03F2203/30114
Apparatus and method in apparatus
There are disclosed various methods and apparatuses. In some embodiments of the method an input signal is provided to an input of a first transistor of a push-pull circuit via a first slew-rate adjuster; and the input signal is also provided to an input of a second transistor of the push-pull circuit via a second slew-rate adjuster. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster to switch the first transistor on after the second transistor switches off when the amplitude of the input signal increases. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster the input signal to switch the second transistor on after the first transistor switches off when the amplitude of the input signal decreases. In some embodiments the apparatus comprises a push-pull circuit comprising a first transistor and a second transistor; an input to receive an input signal; a first slew-rate adjuster adapted to provide the input signal to the input of the first transistor; and a second slew-rate adjuster adapted to provide the input signal to the input of the second transistor. A time constant of the first slew-rate adjuster is dependent on the direction of change of the input signal, and a time constant of the second slew-rate adjuster is dependent on the direction of change of the input signal.
Operational amplifier
An operational amplifier includes a first output transistor and a second output transistor connected in series between two power nodes, the second output transistor having a semiconductor type opposite to the first output transistor, the first output transistor and the second output transistor being electrically coupled at an output node, and gates of the first output transistor and the second output transistor being connected to a first drive node and a second drive node respectively; and a decoupling capacitor circuit electrically connected between the first drive node and the second drive node.
LOW-NOISE AMPLIFIER SUPPORTING MULTI CARRIER OPERATIONS
A radio-frequency (RF) amplifier circuit facilites carrier-aggregation (CA) operation in a wireless communication network. A first amplifier subcircuit is coupled to an input node, and a second amplifier subcircuit is coupled to the input node. An amplifier subcircuit selector is to selectively enable operation of the first amplifier subcircuit, the second amplifier subcircuit, or the first and the second amplifier subcircuits together, in response to a selection indication. A reactive coupling network is arranged to selectively adjust the input impedance at the input node in response to the selection indication to reduce the input impedance variation.
Operational amplifier, integrated circuit, and method for operating the same
An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.
OPERATIONAL AMPLIFIER
An operational amplifier includes a first output transistor and a second output transistor connected in series between two power nodes, the second output transistor having a semiconductor type opposite to the first output transistor, the first output transistor and the second output transistor being electrically coupled at an output node, and gates of the first output transistor and the second output transistor being connected to a first drive node and a second drive node respectively; and a decoupling capacitor circuit electrically connected between the first drive node and the second drive node.
OPERATIONAL AMPLIFIER, INTEGRATED CIRCUIT, AND METHOD FOR OPERATING THE SAME
An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.
Power amplifier circuit
The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.
POWER AMPLIFIER CIRCUIT
The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.
WIRELESS ELECTRIC FIELD POWER TRANSFER SYSTEM, METHOD, TRANSMITTER AND RECEIVER THEREFOR
A wireless electric field power transmission system comprises: a transmitter comprising a transmitter antenna, the transmitter antenna comprising at least two conductors defining a volume therebetween; and at least one receiver, wherein the transmitter antenna transfers power wirelessly via electric field coupling when the at least one receiver is within the volume.
WIRELESS ELECTRIC FIELD POWER TRANSFER SYSTEM, METHOD, TRANSMITTER AND RECEIVER THEREFOR
A wireless electric field power transmission system comprises: a transmitter comprising a transmitter antenna, the transmitter antenna comprising at least two conductors defining a volume therebetween; and at least one receiver, wherein the transmitter antenna transfers power wirelessly via electric field coupling when the at least one receiver is within the volume.