An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.

Certain aspects of the present disclosure provide methods and apparatus for implementing an amplification system. The amplification system includes an amplifier comprising differential inputs and an output. The differential inputs include an inverting input and a non-inverting input. The amplification system further includes a feedback path from the output coupled to the inverting input. The feedback path from the output is coupled to at least one of an inverting amplifier or buffer, and the at least one of the inverting amplifier or buffer is further coupled to the non-inverting input.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

According to an embodiment, there is provided an amplifier circuit including a first capacitive element, a first GM amplifier, and a second GM amplifier. The first GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element. The second GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element and the second input node.

An internal voltage offset between a positive input and a negative input of a first operational amplifier is compensated. The negative input and the positive input of the first operational amplifier are coupled at the same voltage level. A comparison current generated at an output of the first operational amplifier has a sign that is representative of a sign of the internal voltage offset. The output of the first operational amplifier is biased to a threshold voltage using a current-to-voltage converter. A control voltage is generated from a sum of the threshold voltage and a voltage conversion of the comparison current. Compensation for the internal voltage offset between the positive and negative inputs of the first operational amplifier is made dependent on the control voltage.

An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.

An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.

An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.

An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.

A system includes an amplification circuit and offset calibration circuit. The amplification circuit includes a modulation circuit operable to modulate a received signal, an amplifier operable to amplify the modulated signal, and a modulation circuit operable to demodulate the amplified signal. The offset calibration circuit includes a logic circuit operable to set a control signal and adjust the control signal based on an output of the amplification circuit, where the output is based on the demodulated signal, and a compensation signal generator operable to generate a compensation signal based on the control signal to compensate for an offset associated with the amplification circuit, and apply the compensation signal on the amplification circuit to adjust the output of the amplification circuit. The offset calibration circuit in conjunction with the application circuit reduces flicker, offset, and offset drift, and also suppresses the upmodulate ripple due to chopping.