Patent classifications
H03F2203/45042
DIFFERENTIAL AMPLIFIER COMMON-MODE REJECTION RATIO AND GAIN TRIMMING CIRCUIT
The present invention provides a common-mode rejection ratio and gain trimming circuit of differential amplifier, comprising: a first trimming unit and a second trimming unit coupled between an in-phase input voltage and a reference voltage, wherein the first trimming unit and the second trimming unit are coupled to a positive input terminal of the differential amplifier by means of tap switches; a third trimming unit and a fourth trimming unit coupled between tan inverting input voltage and an output terminal of the differential amplifier, wherein the third trimming unit and the fourth trimming unit are coupled to a negative input terminal of the differential amplifier by means of tap switches; wherein, the first trimming unit, the second trimming unit, the third trimming unit, and the fourth trimming unit comprise: a first trimming resistor string and a second trimming resistor string coupled in series; the first trimming resistor string is coupled in parallel with a first trimming auxiliary resistor string, and the second trimming resistor string is coupled in parallel with a second trimming auxiliary resistor string; wherein, the second trimming resistor string of the first trimming unit is coupled to the second trimming resistor string of the second trimming unit, and the second trimming resistor string of the third trimming unit is coupled to the second trimming resistor string of the fourth trimming unit.
RADIO-FREQUENCY DIFFERENTIAL AMPLIFYING CIRCUIT AND RADIO-FREQUENCY MODULE
The radio-frequency differential circuit includes an input balun, an output balun, a first differential amplifying circuit, a second differential amplifying circuit, a first linear feedback circuit and a second linear feedback circuit; the first differential amplifying circuit is arranged between a first output end of the input balun and a first input end of the output balun; the second differential amplifying circuit is arranged between a second output end of the input balun and a second input end of the output balun; a first end of the first linear feedback circuit is connected with the input balun, a second end of the first linear feedback circuit is connected with the first differential amplifying circuit; a first end of the second linear feedback circuit is connected with the input balun, and a second end of the second linear feedback circuit is connected with the second differential amplifying circuit.
Apparatus and method for correcting baseline wander and offset insertion in AC coupling circuits
The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively.
Operational amplifier offset trim
An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.
Differential amplifier common-mode rejection ratio and gain trimming circuit
The present invention provides a common-mode rejection ratio and gain trimming circuit of differential amplifier, comprising: a first trimming unit and a second trimming unit coupled between an in-phase input voltage and a reference voltage, wherein the first trimming unit and the second trimming unit are coupled to a positive input terminal of the differential amplifier by means of tap switches; a third trimming unit and a fourth trimming unit coupled between tan inverting input voltage and an output terminal of the differential amplifier, wherein the third trimming unit and the fourth trimming unit are coupled to a negative input terminal of the differential amplifier by means of tap switches; wherein, the first trimming unit, the second trimming unit, the third trimming unit, and the fourth trimming unit comprise: a first trimming resistor string and a second trimming resistor string coupled in series; the first trimming resistor string is coupled in parallel with a first trimming auxiliary resistor string, and the second trimming resistor string is coupled in parallel with a second trimming auxiliary resistor string; wherein, the second trimming resistor string of the first trimming unit is coupled to the second trimming resistor string of the second trimming unit, and the second trimming resistor string of the third trimming unit is coupled to the second trimming resistor string of the fourth trimming unit.
Differential amplifier circuit
A differential amplifier circuit includes a first input transistor that receives a signal supplied from the first input terminal via a gate thereof, a second input transistor that receives a signal supplied from the second input terminal via a gate thereof, and an offset voltage adjustment circuit that is connected to at least one between the first input terminal and the gate of the first input transistor and between the second input terminal and the gate of the second input transistor.
OPERATIONAL AMPLIFIER OFFSET TRIM
An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.
Operational amplifier offset trim
An integrated circuit (IC) includes first, second, third, and fourth transistors, first and second current source devices, and a trim circuit. The first transistor has a first control input and a first current terminal. The second transistor has a second control input and a second current terminal. The third transistor had a third control input and third and fourth current terminals. The fourth transistor has a fourth control input and fifth and sixth current terminals. The first current source is coupled between a first power supply node and the third current terminal. The second current source is coupled between the first supply node and the fifth current terminal. The trim circuit is coupled between the fourth current terminal and a second power supply node, and is coupled between the sixth current terminal and the second power supply node. The trim circuit includes a resistive digital-to-analog converter (RDAC) circuit.
Amplifier offset cancellation using amplifier supply voltage
In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
Current trimming system, method, and apparatus
A trimming resource includes an adjustable driver resource, a differential voltage generator, and a trim current generator. The adjustable driver resource produces an output signal. The differential voltage generator receives the output signal from the adjustable driver resource and produces a differential drive signal. The trim current generator derives a trim signal from the differential drive signal received from the differential voltage generator. According to one configuration, the trim current generator outputs the trim signal to an electronic component, correcting an operational parameter of the electronic component.