The present application discloses an amplifier circuit, a chip and an electronic device, which generates a positive output signal and a negative output signal according to a positive input signal and a negative input signal, wherein the positive input signal and the negative input signal have a corresponding input differential-mode voltage and input common-mode voltage, and the positive output signal and the negative output signal have a corresponding output differential-mode voltage and output common-mode voltage, and the amplifier circuit includes: an amplifying unit, configured to receive the positive input signal and the negative input signal and generate the positive output signal and the negative output signal; and an attenuation unit, including: a positive common-mode capacitor and a negative common-mode capacitor, configured to attenuate the input common-mode voltage below a first specific frequency.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.

Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.

A current sensing topology uses an amplifier with capacitively coupled inputs in feedback to sense the input offset of the amplifier, which can be compensated for during measurement. The amplifier with capacitively coupled inputs in feedback is used to: operate the amplifier in a region where the input common-mode specifications are relaxed, so that the feedback loop gain and/or bandwidth is higher; operate the sensor from the converter input voltage by employing high-PSRR (power supply rejection ratio) regulators to create a local, clean supply voltage, causing less disruption to the power grid in the switch area; sample the difference between the input voltage and the controller supply, and recreate that between the drain voltages of the power and replica switches; and compensate for power delivery network related (PDN-related) changes in the input voltage during current sensing.

Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.

An operational amplifier with one or more fully-differential amplifier stages has a common-mode control input. A low-frequency feedback control path is coupled between an output of the fully-differential amplifier stages and the common-mode control input to control low-frequency drift of the common-mode voltage of the output of the stages. A high-frequency feed-forward control path couples a pair of inputs of the stages to control high-frequency ripple of a common-mode voltage of the inputs of the stages. One or more of the differential amplifier stages may have a bias input that controls a direct-current (DC) bias voltage of gates of pull-up transistors of the stage that is both DC and capacitively coupled to the gates so that the stage operates with class A bias at DC and with class AB bias at high frequencies.

An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network.

An operational amplifier with one or more fully-differential amplifier stages has a common-mode control input. A low-frequency feedback control path is coupled between an output of the fully-differential amplifier stages and the common-mode control input to control low-frequency drift of the common-mode voltage of the output of the stages. A high-frequency feed-forward control path couples a pair of inputs of the stages to control high-frequency ripple of a common-mode voltage of the inputs of the stages. One or more of the differential amplifier stages may have a bias input that controls a direct-current (DC) bias voltage of gates of pull-up transistors of the stage that is both DC and capacitively coupled to the gates so that the stage operates with class A bias at DC and with class AB bias at high frequencies.

A chopper amplifying circuit employing a negative impedance compensation technique, including a differential input end, a first-level chopper switch, a first-level amplifying circuit, a second-level chopper switch, a second-level amplifying circuit, a negative impedance converting circuit, a negative feedback unit, an input capacitor, and a differential output end, is provided. The differential input end is connected to the first-level chopper switch. An output terminal of the first-level chopper switch is connected to the first-level amplifying circuit through the input capacitor. The first-level amplifying circuit is connected to the second-level chopper switch, which is connected to the second-level amplifying circuit. The second-level amplifying circuit is connected to the differential output end, and is also connected to a feedback input end of the first-level amplifying circuit through the negative feedback unit. The negative impedance converting circuit is parallel-connected to a signal input end of the first-level amplifying circuit.

A current sensing topology uses an amplifier with capacitively coupled inputs in feedback to sense the input offset of the amplifier, which can be compensated for during measurement. The amplifier with capacitively coupled inputs in feedback is used to: operate the amplifier in a region where the input common-mode specifications are relaxed, so that the feedback loop gain and/or bandwidth is higher; operate the sensor from the converter input voltage by employing high-PSRR (power supply rejection ratio) regulators to create a local, clean supply voltage, causing less disruption to the power grid in the switch area; sample the difference between the input voltage and the controller supply, and recreate that between the drain voltages of the power and replica switches; and compensate for power delivery network related (PDN-related) changes in the input voltage during current sensing.