An analog differential amplifier circuit, such as an operational transconductance amplifier (OTA), with input offset correction capability. First and second analog floating gate (AFG) devices each include a trim transistor connected in parallel with a series transistor in first and second input legs, respectively, of the amplifier. Floating gate electrodes in the AFG devices are differentially programmed to correct for error in the output signal in response to zero input differential voltage at its inputs. Temperature stability is attained by programming the floating gate electrodes to gate voltages above the floating gate transistors. In one embodiment, the AFG devices each include a second trim transistor sharing the same floating gate electrode; the sum of the currents conducted by the second trim transistors is added, by way of a current mirror, to the tail current applied to the first and second input legs.

An analog differential amplifier circuit, such as an operational transconductance amplifier (OTA), with input offset correction capability. First and second analog floating gate (AFG) devices each include a trim transistor connected in parallel with a series transistor in first and second input legs, respectively, of the amplifier. Floating gate electrodes in the AFG devices are differentially programmed to correct for error in the output signal in response to zero input differential voltage at its inputs. Temperature stability is attained by programming the floating gate electrodes to gate voltages above the floating gate transistors. In one embodiment, the AFG devices each include a second trim transistor sharing the same floating gate electrode; the sum of the currents conducted by the second trim transistors is added, by way of a current mirror, to the tail current applied to the first and second input legs.