A peak detector includes an asymmetrical latch having a first input and a second input; and a CMOS converter having a first input coupled to a first output of the asymmetrical latch, a second input coupled to a second output of the asymmetrical latch, and an output.

An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.

A detecting device includes a pyroelectric element that generates charge by a pyroelectric effect in a first detection terminal and a second detection terminal, a chopper amplifier circuit that generates an amplified signal in response to the charge generated in the first detection terminal and the second detection terminal by chopping, and an initialization switch that controls electrical connection between the second detection terminal and a power source for generating an initialized voltage, and the initialization switch is turned on before a start of an amplification operation by the amplifier circuit and is off during the amplification operation.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

A FBDDA amplifier comprising: a first differential input stage, which receives an input voltage; a second differential input stage, which receives a common-mode voltage; a first resistive-degeneration group coupled to the first differential input; a second resistive-degeneration group coupled to the second differential input; a differential output stage, generating an output voltage; a first switch coupled in parallel to the first resistive-degeneration group; and a second switch coupled in parallel to the second resistive-degeneration group. The first and second switches are driven into the closed state when the voltage input assumes a first value such that said first input stage operates in the linear region, and are driven into the open state when the voltage input assumes a second value, higher than the first value, such that the first input stage operates in a non-linear region.

Certain aspects of the present disclosure provide methods and apparatus for implementing an amplification system. The amplification system includes an amplifier comprising differential inputs and an output. The differential inputs include an inverting input and a non-inverting input. The amplification system further includes a feedback path from the output coupled to the inverting input. The feedback path from the output is coupled to at least one of an inverting amplifier or buffer, and the at least one of the inverting amplifier or buffer is further coupled to the non-inverting input.

An embodiment voltage-current converter circuit comprises a first amplifier and a second amplifier having homologous first input nodes configured to receive a voltage signal therebetween as well as homologous second input nodes having a resistor coupled therebetween. First and second current mirror circuits are provided comprising first input transistors having their control terminal coupled to the output nodes of the amplifiers. First and second current sensing circuitry having first and second current output nodes are coupled to the current mirror output nodes of the current mirror circuits and configured to provide therebetween a current which is a function of the voltage signal between the homologous first input nodes of the amplifier.

A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal.

The disclosure relates to a driver amplifier circuit. The driver amplifier circuit includes a non-linear differential amplifier and a non-linear resistor connected across output terminals of the differential amplifier. The non-linear resistor has a resistance value that increases as the differential voltage amplitude across the non-linear resistor increases. A transmitter may include the driver amplifier.

A complex current measurement circuit for a guard-sense capacitive sensor includes a periodic signal voltage source, a differential transimpedance amplifier circuit (DTA) and a demultiplexer circuit (DMX). At least one sense antenna electrode of the capacitive sensor is electrically connectable to a signal input line of the DMX which has signal output lines electrically connected to differential signal input lines of the DTA. The DTA includes operational amplifiers having input ports each electrically connected to one of the signal output lines. For each differential signal input line, either a capacitor is electrically connected between an output port of the voltage source and the differential signal input line, wherein an impedance of the capacitor is close to zero Ohm, or a galvanic connection is provided to one of the signal output lines. An output signal provided by the DTA is usable for determining a complex sense current of the capacitive sensor.