An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.

An amplifier circuit is provided. The amplifier circuit outputs a pair of differential output signals through a first output terminal and a second output terminal. The amplifier circuit includes a first amplifier stage electrically connected to a first node and a second node for amplifying a pair of differential input signals; a second amplifier stage which is electrically connected to the first node and the second node and coupled to the first output terminal and the second output terminal; a first switch, coupled between the first output terminal and a first reference voltage; a second switch, coupled between the second output terminal and the first reference voltage; a third switch, coupled between the first node and the first reference voltage; a fourth switch coupled between the second node and the first reference voltage; and a fifth switch coupled between a second reference voltage and the first amplifier stage.

A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a variable gain amplifier that includes a first transistor and a second transistor whose gate terminals are coupled to a first input terminal. A first drain terminal of the first transistor and a first source terminal of the second transistor is coupled to a voltage gain control switch. There are other embodiments as well.

Circuits and methods related to power amplifiers. In some implementations, a bias circuit includes a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level. The bias circuit also includes a differential amplifier connectable to receive the first electrical supply level, the differential amplifier having a first input connectable to a first node of the reference device and a second input connectable to receive a reference electrical level, the differential amplifier arranged to maintain a first electrical level on the first node of the reference device as a function of the reference electrical level.

The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively.

A power amplifier arrangement comprises a power amplifier comprising at least one transistor having a first gate and a second gate. The first gate is configured to receive a radio frequency input signal superimposed with a first control signal, and the second gate is configured to receive a second control signal. The first control signal is a linearization signal varying in relation to an envelope of the input signal and the second control signal is a temperature compensation signal varying in relation to a temperature of the power amplifier, or vice versa.

Disclosed herein are a method, circuitry and an integrated circuit chip for use in signal processing. The integrated circuit chip comprises an operational amplifier, a reference amplifier, and a control unit. The control unit is coupled to the reference amplifier and to the operational amplifier. The control unit is configured to control the reference amplifier based on a signal received from the reference amplifier.

A power amplifying circuit includes a switching circuit, an amplifier and a load. The switching circuit receives a first supply voltage and a second supply voltage. When the switching circuit is in a first operation mode, the first supply voltage is provided to a node. When the switching circuit is in a second operation mode, the second supply voltage is provided to the node. The amplifier receives a first input signal and a second input signal, and outputs a first output signal and a second output signal from a first output terminal and a second output signal, respectively. The load includes a first inductor and a second inductor. The first inductor is connected between the node and the first output terminal. The second inductor is connected between the node and the second output terminal.

A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal.